if module doesn't explicitly depend on specific Pci spec, it should include IndustryS...

Also remove those self-defined "bit(a)" macro, it had been defined as BITx in Base.h.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8994 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c b/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c
index 8e18910379b43e0d4075c64362ae1c12f6d95741..43b18113d255ed236c0a931eaa2ade274cd03789 100644 (file)
--- a/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c
+++ b/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.c
@@ -822,7 +822,7 @@ Returns:
     //\r
     // disable Interrupt\r
     //\r
     //\r
     // disable Interrupt\r
     //\r

-    DeviceControlValue |= bit (1);\r
+    DeviceControlValue |= BIT1;\r

     WritePortB (\r
       AtapiScsiPrivate->PciIo,\r
       AtapiScsiPrivate->IoPort->Alt.DeviceControl,\r
     WritePortB (\r
       AtapiScsiPrivate->PciIo,\r
       AtapiScsiPrivate->IoPort->Alt.DeviceControl,\r


@@ -922,7 +922,7 @@ Returns:
   //\r
   // bit7 and bit5 are both set to 1 for backward compatibility\r
   //\r
   //\r
   // bit7 and bit5 are both set to 1 for backward compatibility\r
   //\r

-  DeviceSelect = (UINT8) (((bit (7) | bit (5)) | (Target << 4)));\r
+  DeviceSelect = (UINT8) (((BIT7 | BIT5) | (Target << 4)));\r

   WritePortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->Head, DeviceSelect);\r
 \r
   Command = ATAPI_SOFT_RESET_CMD;\r
   WritePortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->Head, DeviceSelect);\r
 \r
   Command = ATAPI_SOFT_RESET_CMD;\r


@@ -1336,7 +1336,7 @@ Returns:
     //\r
     // disable Interrupt\r
     //\r
     //\r
     // disable Interrupt\r
     //\r

-    DeviceControlValue |= bit (1);\r
+    DeviceControlValue |= BIT1;\r

     WritePortB (\r
       AtapiScsiPrivate->PciIo,\r
       AtapiScsiPrivate->IoPort->Alt.DeviceControl,\r
     WritePortB (\r
       AtapiScsiPrivate->PciIo,\r
       AtapiScsiPrivate->IoPort->Alt.DeviceControl,\r


@@ -1438,7 +1438,7 @@ Returns:
   //\r
   // bit7 and bit5 are both set to 1 for backward compatibility\r
   //\r
   //\r
   // bit7 and bit5 are both set to 1 for backward compatibility\r
   //\r

-  DeviceSelect = (UINT8) (((bit (7) | bit (5)) | (TargetId << 4)));\r
+  DeviceSelect = (UINT8) ((BIT7 | BIT5) | (TargetId << 4));\r

   WritePortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->Head, DeviceSelect);\r
 \r
   Command = ATAPI_SOFT_RESET_CMD;\r
   WritePortB (AtapiScsiPrivate->PciIo, AtapiScsiPrivate->IoPort->Head, DeviceSelect);\r
 \r
   Command = ATAPI_SOFT_RESET_CMD;\r

diff --git a/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.h b/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.h
index 78501f7f4a92e85c10d0aed634153d6644cd4c17..9086dd9bdcaba491fa5f8431b97db2432a1d543f 100644 (file)
--- a/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.h
+++ b/OptionRomPkg/AtapiPassThruDxe/AtapiPassThru.h
@@ -34,13 +34,7 @@
 #include <Library/PcdLib.h>\r
 #include <Library/DevicePathLib.h>\r
 \r
 #include <Library/PcdLib.h>\r
 #include <Library/DevicePathLib.h>\r
 \r

-#include <IndustryStandard/Pci22.h>\r
-\r
-\r
-///\r
-/// bit definition\r
-///\r
-#define bit(a)        (1 << (a))\r
+#include <IndustryStandard/Pci.h>\r

 \r
 #define MAX_TARGET_ID 4\r
 \r
 \r
 #define MAX_TARGET_ID 4\r
 \r


@@ -212,31 +206,31 @@ typedef struct {
 //\r
 // ATA Err Reg bitmap\r
 //\r
 //\r
 // ATA Err Reg bitmap\r
 //\r

-#define BBK_ERR   bit (7) ///< Bad block detected\r
-#define UNC_ERR   bit (6) ///< Uncorrectable Data\r
-#define MC_ERR    bit (5) ///< Media Change\r
-#define IDNF_ERR  bit (4) ///< ID Not Found\r
-#define MCR_ERR   bit (3) ///< Media Change Requested\r
-#define ABRT_ERR  bit (2) ///< Aborted Command\r
-#define TK0NF_ERR bit (1) ///< Track 0 Not Found\r
-#define AMNF_ERR  bit (0) ///< Address Mark Not Found\r
+#define BBK_ERR   BIT7 ///< Bad block detected\r
+#define UNC_ERR   BIT6 ///< Uncorrectable Data\r
+#define MC_ERR    BIT5 ///< Media Change\r
+#define IDNF_ERR  BIT4 ///< ID Not Found\r
+#define MCR_ERR   BIT3 ///< Media Change Requested\r
+#define ABRT_ERR  BIT2 ///< Aborted Command\r
+#define TK0NF_ERR BIT1 ///< Track 0 Not Found\r
+#define AMNF_ERR  BIT0 ///< Address Mark Not Found\r

 \r
 //\r
 // ATAPI Err Reg bitmap\r
 //\r
 \r
 //\r
 // ATAPI Err Reg bitmap\r
 //\r

-#define SENSE_KEY_ERR (bit (7) | bit (6) | bit (5) | bit (4))\r
-#define EOM_ERR bit (1) ///< End of Media Detected\r
-#define ILI_ERR bit (0) ///< Illegal Length Indication\r
+#define SENSE_KEY_ERR (BIT7 | BIT6 | BIT5 | BIT4)\r
+#define EOM_ERR BIT1 ///< End of Media Detected\r
+#define ILI_ERR BIT0 ///< Illegal Length Indication\r

 \r
 //\r
 // Device/Head Reg\r
 //\r
 \r
 //\r
 // Device/Head Reg\r
 //\r

-#define LBA_MODE  bit (6)\r
-#define DEV       bit (4)\r
-#define HS3       bit (3)\r
-#define HS2       bit (2)\r
-#define HS1       bit (1)\r
-#define HS0       bit (0)\r
+#define LBA_MODE  BIT6\r
+#define DEV       BIT4\r
+#define HS3       BIT3\r
+#define HS2       BIT2\r
+#define HS1       BIT1\r
+#define HS0       BIT0\r

 #define CHS_MODE  (0)\r
 #define DRV0      (0)\r
 #define DRV1      (1)\r
 #define CHS_MODE  (0)\r
 #define DRV0      (0)\r
 #define DRV1      (1)\r


@@ -246,34 +240,34 @@ typedef struct {
 //\r
 // Status Reg\r
 //\r
 //\r
 // Status Reg\r
 //\r

-#define BSY   bit (7) ///< Controller Busy\r
-#define DRDY  bit (6) ///< Drive Ready\r
-#define DWF   bit (5) ///< Drive Write Fault\r
-#define DSC   bit (4) ///< Disk Seek Complete\r
-#define DRQ   bit (3) ///< Data Request\r
-#define CORR  bit (2) ///< Corrected Data\r
-#define IDX   bit (1) ///< Index\r
-#define ERR   bit (0) ///< Error\r
-#define CHECK bit (0) ///< Check bit for ATAPI Status Reg\r
+#define BSY   BIT7 ///< Controller Busy\r
+#define DRDY  BIT6 ///< Drive Ready\r
+#define DWF   BIT5 ///< Drive Write Fault\r
+#define DSC   BIT4 ///< Disk Seek Complete\r
+#define DRQ   BIT3 ///< Data Request\r
+#define CORR  BIT2 ///< Corrected Data\r
+#define IDX   BIT1 ///< Index\r
+#define ERR   BIT0 ///< Error\r
+#define CHECK BIT0 ///< Check bit for ATAPI Status Reg\r

 \r
 //\r
 // Device Control Reg\r
 //\r
 \r
 //\r
 // Device Control Reg\r
 //\r

-#define SRST  bit (2) ///< Software Reset\r
-#define IEN_L bit (1) ///< Interrupt Enable\r
+#define SRST  BIT2 ///< Software Reset\r
+#define IEN_L BIT1 ///< Interrupt Enable\r

 \r
 //\r
 // ATAPI Feature Register\r
 //\r
 \r
 //\r
 // ATAPI Feature Register\r
 //\r

-#define OVERLAP bit (1)\r
-#define DMA     bit (0)\r
+#define OVERLAP BIT1\r
+#define DMA     BIT0\r

 \r
 //\r
 // ATAPI Interrupt Reason Reson Reg (ATA Sector Count Register)\r
 //\r
 \r
 //\r
 // ATAPI Interrupt Reason Reson Reg (ATA Sector Count Register)\r
 //\r

-#define RELEASE     bit (2)\r
-#define IO          bit (1)\r
-#define CoD         bit (0)\r
+#define RELEASE     BIT2\r
+#define IO          BIT1\r
+#define CoD         BIT0\r

 \r
 #define PACKET_CMD  0xA0\r
 \r
 \r
 #define PACKET_CMD  0xA0\r
 \r

diff --git a/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.h b/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.h
index c426cb2ab7d265ef0fa8e64d777036605380ce59..90886f03370ccdee8e8aee808f425e89033a99dc 100644 (file)
--- a/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.h
+++ b/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.h
@@ -40,7 +40,7 @@
 #include <Library/DevicePathLib.h>\r
 #include <Library/TimerLib.h>\r
 \r
 #include <Library/DevicePathLib.h>\r
 #include <Library/TimerLib.h>\r
 \r

-#include <IndustryStandard/Pci22.h>\r
+#include <IndustryStandard/Pci.h>\r

 //\r
 // Cirrus Logic 5430 PCI Configuration Header values\r
 //\r
 //\r
 // Cirrus Logic 5430 PCI Configuration Header values\r
 //\r