};\r
\r
\r
+UINT16 mHostBridgeDevId;\r
+\r
EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;\r
\r
BOOLEAN mS3Supported = FALSE;\r
VOID\r
)\r
{\r
- UINT16 HostBridgeDevId;\r
UINTN PmCmd;\r
UINTN Pmba;\r
UINTN AcpiCtlReg;\r
BuildCpuHob (36, 16);\r
\r
//\r
- // Query Host Bridge DID to determine platform type and save to PCD\r
+ // Determine platform type and save Host Bridge DID to PCD\r
//\r
- HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
- switch (HostBridgeDevId) {\r
+ switch (mHostBridgeDevId) {\r
case INTEL_82441_DEVICE_ID:\r
PmCmd = POWER_MGMT_REGISTER_PIIX4 (PCI_COMMAND_OFFSET);\r
Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);\r
break;\r
default:\r
DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",\r
- __FUNCTION__, HostBridgeDevId));\r
+ __FUNCTION__, mHostBridgeDevId));\r
ASSERT (FALSE);\r
return;\r
}\r
- PcdSet16 (PcdOvmfHostBridgePciDevId, HostBridgeDevId);\r
+ PcdSet16 (PcdOvmfHostBridgePciDevId, mHostBridgeDevId);\r
\r
//\r
// If the appropriate IOspace enable bit is set, assume the ACPI PMBA\r
InitializeXen ();\r
}\r
\r
+ //\r
+ // Query Host Bridge DID\r
+ //\r
+ mHostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);\r
+\r
if (mBootMode != BOOT_ON_S3_RESUME) {\r
ReserveEmuVariableNvStore ();\r
\r