SourceLevelDebugPkg: Pack CPU context structures

Use #pragma pack to ensure that ASM and C code agree on
the structure layout between various compilers.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11331 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h
index 3c279589e766d5ed563643fb788f58800e254f79..909ddbe5359169f762119fcb129e2e887e2927e9 100644 (file)
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/Ia32/ArchRegisters.h
@@ -1,7 +1,7 @@
 /** @file\r
   IA32 register defintions needed by debug transfer protocol.\r
 \r
-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -15,6 +15,8 @@
 #ifndef _ARCH_REGISTERS_H_\r
 #define _ARCH_REGISTERS_H_\r
 \r
+#pragma pack(1)\r
+\r
 ///\r
 /// FXSAVE_STATE\r
 /// FP / MMX / XMM registers (see fxrstor instruction definition)\r
@@ -153,4 +155,6 @@ typedef struct {
   UINT32         TssBas;\r
 } DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_IA32;\r
 \r
+#pragma pack()\r
+\r
 #endif\r

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h
index e7a5a330890071f847bd13b9d6fa2534250a00b4..96753919569fcda87cfc3b4b9d0b8412c10df975 100644 (file)
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h
@@ -1,7 +1,7 @@
 /** @file\r
   X64 register defintions needed by debug transfer protocol.\r
 \r
-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -15,6 +15,8 @@
 #ifndef _ARCH_REGISTERS_H_\r
 #define _ARCH_REGISTERS_H_\r
 \r
+#pragma pack(1)\r
+\r
 ///\r
 /// FXSAVE_STATE (promoted operation)\r
 /// FP / MMX / XMM registers (see fxrstor instruction definition)\r
@@ -325,5 +327,6 @@ typedef struct {
   UINT64         Tssas;\r
 } DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BASES_X64;\r
 \r
+#pragma pack()\r
 \r
 #endif\r