CorebootPayloadPkg: Assume no PCI serial devices

Set the vendor to 0xffff which indicates the end of the list.

Change-Id: If6475e04d3675f0a932571a85d1dd3f301416b6a
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
eviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Prince Agyeman <prince.agyeman@intel.com>

diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
index 907e95202229fb300719b3ce67cd21acfa840690..06e9b319dd1e46cc0e970a01ec8589b26a6f7e39 100644 (file)
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc
@@ -67,10 +67,10 @@
   #    UINT8   Reserved[2];\r
   #  } PCI_SERIAL_PARAMETER;\r
   #\r
-  # Vendor 0000 Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)\r
+  # Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)
   #\r
   #                                           [Vendor]   [Device]  [----ClockRate---]  [------------Offset-----------] [Bar] [Stride] [RxFifo] [TxFifo]   [Rsvd]   [Vendor]\r
-  DEFINE PCI_SERIAL_PARAMETERS            = {0x00,0x00, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,    0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}\r
+  DEFINE PCI_SERIAL_PARAMETERS            = {0xff,0xff, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,    0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}
 \r
   #\r
   # Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI]\r

diff --git a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
index 90a484d55cc1d3b506a4d68dab27e113c13d442c..286d886d622a40612f064ea02874c1310935f3c3 100644 (file)
--- a/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
+++ b/CorebootPayloadPkg/CorebootPayloadPkgIa32X64.dsc
@@ -67,10 +67,10 @@
   #    UINT8   Reserved[2];\r
   #  } PCI_SERIAL_PARAMETER;\r
   #\r
-  # Vendor 0000 Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)\r
+  # Vendor FFFF Device 0000 Prog Interface 1, BAR #0, Offset 0, Stride = 1, Clock 1843200 (0x1c2000)
   #\r
   #                                           [Vendor]   [Device]  [----ClockRate---]  [------------Offset-----------] [Bar] [Stride] [RxFifo] [TxFifo]   [Rsvd]   [Vendor]\r
-  DEFINE PCI_SERIAL_PARAMETERS            = {0x00,0x00, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,    0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}\r
+  DEFINE PCI_SERIAL_PARAMETERS            = {0xff,0xff, 0x00,0x00, 0x0,0x20,0x1c,0x00, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x00,    0x01, 0x0,0x0, 0x0,0x0, 0x0,0x0, 0xff,0xff}
 \r
   #\r
   # Shell options: [BUILD_SHELL, FULL_BIN, MIN_BIN, NONE, UEFI]\r