]> git.proxmox.com Git - mirror_edk2.git/commitdiff
UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO
authorJeff Fan <jeff.fan@intel.com>
Fri, 29 Jul 2016 13:13:34 +0000 (21:13 +0800)
committerJeff Fan <jeff.fan@intel.com>
Wed, 17 Aug 2016 11:58:48 +0000 (19:58 +0800)
EnableExecuteDisable in MP_CPU_EXCHANGE_INFO is used to tell AP reset vector if
enable execute disable feature on APs. This feature should be enabled before CR3
is written.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
UefiCpuPkg/Library/MpInitLib/MpLib.h
UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm

index 015396af80b67e91abf73d9b290a04bad867dd01..60add860d18065941ab3ca3c7f47ab2c07994520 100644 (file)
@@ -36,4 +36,6 @@ ModeOffsetLocation            equ        LockLocation + 20h
 NumApsExecutingLocation       equ        LockLocation + 24h\r
 CodeSegmentLocation           equ        LockLocation + 28h\r
 DataSegmentLocation           equ        LockLocation + 2Ch\r
+EnableExecuteDisableLocation  equ        LockLocation + 30h\r
+Cr3Location                   equ        LockLocation + 3Ch\r
 \r
index 7050413c5af39680bdb42d0751824b0f6295b6a0..8bacb4283641370eab2be4d83a8e9894fe649cdf 100644 (file)
@@ -85,6 +85,36 @@ Flat32Start:                                   ; protected mode entry point
     mov        ss, dx\r
 \r
     mov        esi, ebx\r
+\r
+    mov         edi, esi\r
+    add         edi, EnableExecuteDisableLocation\r
+    cmp         byte [edi], 0\r
+    jz          SkipEnableExecuteDisable\r
+\r
+    ;\r
+    ; Enable IA32 PAE execute disable\r
+    ;\r
+\r
+    mov         ecx, 0xc0000080\r
+    rdmsr\r
+    bts         eax, 11\r
+    wrmsr\r
+\r
+    mov         edi, esi\r
+    add         edi, Cr3Location\r
+    mov         eax, dword [edi]\r
+    mov         cr3, eax\r
+\r
+    mov         eax, cr4\r
+    bts         eax, 5\r
+    mov         cr4, eax\r
+\r
+    mov         eax, cr0\r
+    bts         eax, 31\r
+    mov         cr0, eax\r
+\r
+SkipEnableExecuteDisable:\r
+\r
     mov        edi, esi\r
     add        edi, LockLocation\r
     mov        eax, NotVacantFlag\r
index 92d1dd9f6ac66505fc2ddd1da9cef38db378db18..28a3cd4b82686d2e67f1e9fefd3dbfe5e7287975 100644 (file)
@@ -55,6 +55,7 @@ typedef struct {
   UINTN                 NumApsExecuting;\r
   UINTN                 CodeSegment;\r
   UINTN                 DataSegment;\r
+  UINTN                 EnableExecuteDisable;\r
   UINTN                 Cr3;\r
 } MP_CPU_EXCHANGE_INFO;\r
 \r
index 5aac212449a23f16cb93e39575e6d92b33827201..d533741f0e2b0141f09d336f513b4063a6a466a8 100644 (file)
@@ -36,6 +36,8 @@ ModeOffsetLocation            equ        LockLocation + 3Ch
 NumApsExecutingLocation       equ        LockLocation + 44h\r
 CodeSegmentLocation           equ        LockLocation + 4Ch\r
 DataSegmentLocation           equ        LockLocation + 54h\r
-Cr3Location                   equ        LockLocation + 5Ch\r
+EnableExecuteDisableLocation  equ        LockLocation + 5Ch\r
+Cr3Location                   equ        LockLocation + 64h\r
+\r
 \r
 ;-------------------------------------------------------------------------------\r
index 848992ca4484293e1e17ecf7d713ec87facd529e..3c55ffaafecc53b37ba96417b9ea9e43a0000885 100644 (file)
@@ -69,6 +69,19 @@ o32 lgdt       [cs:si]
     mov        si, IdtrLocation\r
 o32 lidt       [cs:si]\r
 \r
+    mov        si, EnableExecuteDisableLocation\r
+    cmp        byte [si], 0\r
+    jz         SkipEnableExecuteDisableBit\r
+\r
+    ;\r
+    ; Enable execute disable bit\r
+    ;\r
+    mov        ecx, 0c0000080h             ; EFER MSR number\r
+    rdmsr                                  ; Read EFER\r
+    bts        eax, 11                     ; Enable Execute Disable Bit\r
+    wrmsr                                  ; Write EFER\r
+\r
+SkipEnableExecuteDisableBit:\r
 \r
     mov        di,  DataSegmentLocation\r
     mov        edi, [di]                   ; Save long mode DS in edi\r