#------------------------------------------------------------------------------\r
#*\r
-#* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+#* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
#* This program and the accompanying materials\r
#* are licensed and made available under the terms and conditions of the BSD License\r
#* which accompanies this distribution. The full text of the license may be found at\r
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
movl %dr7, %eax\r
pushl %eax\r
-#; clear Dr7 while executing debugger itself\r
- xorl %eax, %eax\r
- movl %eax, %dr7\r
-\r
movl %dr6, %eax\r
pushl %eax\r
-#; insure all status bits in dr6 are clear...\r
- xorl %eax, %eax\r
- movl %eax, %dr6\r
-\r
movl %dr3, %eax\r
pushl %eax\r
movl %dr2, %eax\r
addl $512, %esp\r
\r
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- popl %eax\r
- movl %eax, %dr0\r
- popl %eax\r
- movl %eax, %dr1\r
- popl %eax\r
- movl %eax, %dr2\r
- popl %eax\r
- movl %eax, %dr3\r
-#; skip restore of dr6. We cleared dr6 during the context save.\r
- addl $4, %esp\r
- popl %eax\r
- movl %eax, %dr7\r
+#; Skip restoration of DRx registers to support in-circuit emualators\r
+#; or debuggers set breakpoint in interrupt/exception context\r
+ addl $24, %esp\r
\r
#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
popl %eax\r
TITLE CpuAsm.asm:\r
;------------------------------------------------------------------------------\r
;*\r
-;* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+;* Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
;* This program and the accompanying materials\r
;* are licensed and made available under the terms and conditions of the BSD License\r
;* which accompanies this distribution. The full text of the license may be found at\r
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
mov eax, dr7\r
push eax\r
-;; clear Dr7 while executing debugger itself\r
- xor eax, eax\r
- mov dr7, eax\r
-\r
mov eax, dr6\r
push eax\r
-;; insure all status bits in dr6 are clear...\r
- xor eax, eax\r
- mov dr6, eax\r
-\r
mov eax, dr3\r
push eax\r
mov eax, dr2\r
add esp, 512\r
\r
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- pop eax\r
- mov dr0, eax\r
- pop eax\r
- mov dr1, eax\r
- pop eax\r
- mov dr2, eax\r
- pop eax\r
- mov dr3, eax\r
-;; skip restore of dr6. We cleared dr6 during the context save.\r
- add esp, 4\r
- pop eax\r
- mov dr7, eax\r
+;; Skip restoration of DRx registers to support in-circuit emualators\r
+;; or debuggers set breakpoint in interrupt/exception context\r
+ add esp, 4 * 6\r
\r
;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
pop eax\r
\r
#------------------------------------------------------------------------------\r
#*\r
-#* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+#* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
#* This program and the accompanying materials\r
#* are licensed and made available under the terms and conditions of the BSD License\r
#* which accompanies this distribution. The full text of the license may be found at\r
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
movq %dr7, %rax\r
pushq %rax\r
-#; clear Dr7 while executing debugger itself\r
- xorq %rax, %rax\r
- movq %rax, %dr7\r
-\r
movq %dr6, %rax\r
pushq %rax\r
-#; insure all status bits in dr6 are clear...\r
- xorq %rax, %rax\r
- movq %rax, %dr6\r
-\r
movq %dr3, %rax\r
pushq %rax\r
movq %dr2, %rax\r
addq $512, %rsp\r
\r
#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- popq %rax\r
- movq %rax, %dr0\r
- popq %rax\r
- movq %rax, %dr1\r
- popq %rax\r
- movq %rax, %dr2\r
- popq %rax\r
- movq %rax, %dr3\r
-#; skip restore of dr6. We cleared dr6 during the context save.\r
- addq $8, %rsp\r
- popq %rax\r
- movq %rax, %dr7\r
+#; Skip restoration of DRx registers to support in-circuit emualators\r
+#; or debuggers set breakpoint in interrupt/exception context\r
+ addq $48, %rsp\r
\r
#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
popq %rax\r
TITLE CpuAsm.asm: \r
;------------------------------------------------------------------------------\r
;*\r
-;* Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+;* Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
;* This program and the accompanying materials \r
;* are licensed and made available under the terms and conditions of the BSD License \r
;* which accompanies this distribution. The full text of the license may be found at \r
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
mov rax, dr7\r
push rax\r
-;; clear Dr7 while executing debugger itself\r
- xor rax, rax\r
- mov dr7, rax\r
-\r
mov rax, dr6\r
push rax\r
-;; insure all status bits in dr6 are clear...\r
- xor rax, rax\r
- mov dr6, rax\r
-\r
mov rax, dr3\r
push rax\r
mov rax, dr2\r
add rsp, 512\r
\r
;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- pop rax\r
- mov dr0, rax\r
- pop rax\r
- mov dr1, rax\r
- pop rax\r
- mov dr2, rax\r
- pop rax\r
- mov dr3, rax\r
-;; skip restore of dr6. We cleared dr6 during the context save.\r
- add rsp, 8\r
- pop rax\r
- mov dr7, rax\r
+;; Skip restoration of DRx registers to support in-circuit emualators\r
+;; or debuggers set breakpoint in interrupt/exception context\r
+ add rsp, 8 * 6\r
\r
;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
pop rax\r