//\r
typedef UINT64 PHYSICAL_ADDRESS;\r
\r
-//\r
-// LIST_ENTRY definition.\r
-//\r
+///\r
+/// LIST_ENTRY definition.\r
+///\r
typedef struct _LIST_ENTRY LIST_ENTRY;\r
\r
struct _LIST_ENTRY {\r
\r
typedef INTN RETURN_STATUS;\r
\r
-//\r
-// Set the upper bit to indicate EFI Error.\r
-//\r
+///\r
+/// Set the upper bit to indicate EFI Error.\r
+///\r
#define ENCODE_ERROR(a) (MAX_BIT | (a))\r
\r
#define ENCODE_WARNING(a) (a)\r
Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 8-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 8-bit value is returned.\r
\r
If 8-bit operations are not supported, then ASSERT().\r
Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 16-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 16-bit value is returned.\r
\r
If 16-bit operations are not supported, then ASSERT().\r
Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 32-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 32-bit value is returned.\r
\r
If 32-bit operations are not supported, then ASSERT().\r
Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 64-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 64-bit value is returned.\r
\r
If 64-bit operations are not supported, then ASSERT().\r
\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r
+ Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r
writes the result back to the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the lower 32-bits of the read result and the value specified by\r
OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
32-bits of the value written to the MSR is returned. No parameter checking is\r
\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r
on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
lower 32-bits of the read result and the value specified by AndData\r
- preserving the upper 32-bits, performs a bitwise inclusive OR between the\r
+ preserving the upper 32-bits, performs a bitwise OR between the\r
result of the AND operation and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
written to the MSR is returned. No parameter checking is performed on Index,\r
Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
field is specified by the StartBit and the EndBit. All other bits in the\r
destination MSR are preserved. The lower 32-bits of the MSR written is\r
- returned. Extra left bits in Value are stripped. The caller must either\r
- guarantee that Index and the data written is valid, or the caller must set up\r
- exception handlers to catch the exceptions. This function is only available\r
- on IA-32 and x64.\r
+ returned. The caller must either guarantee that Index and the data written \r
+ is valid, or the caller must set up exception handlers to catch the exceptions. \r
+ This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
result back to the bit field in the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
written to the MSR are returned. Extra left bits in OrData are stripped. The\r
\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit MSR specified by Index. The\r
lower 32-bits of the value written to the MSR are returned. Extra left bits\r
in both AndData and OrData are stripped. The caller must either guarantee\r
\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r
+ Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r
back to the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Index. The value written to the MSR is\r
returned. No parameter checking is performed on Index or OrData, and some of\r
\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
OR, and writes the result back to the 64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
- result and the value specified by AndData, performs a bitwise inclusive OR\r
+ result and the value specified by AndData, performs a bitwise OR\r
between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 64-bit MSR specified by Index. The value written\r
to the MSR is returned. No parameter checking is performed on Index, AndData,\r
\r
Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
the StartBit and the EndBit. All other bits in the destination MSR are\r
- preserved. The MSR written is returned. Extra left bits in Value are\r
- stripped. The caller must either guarantee that Index and the data written is\r
- valid, or the caller must set up exception handlers to catch the exceptions.\r
- This function is only available on IA-32 and x64.\r
+ preserved. The MSR written is returned. The caller must either guarantee \r
+ that Index and the data written is valid, or the caller must set up exception \r
+ handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 63, then ASSERT().\r
If EndBit is greater than 63, then ASSERT().\r
\r
\r
/**\r
- Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r
writes the result back to the bit field in the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Index. The value written to the MSR is\r
returned. Extra left bits in OrData are stripped. The caller must either\r
\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
- a bitwise inclusive OR between the read result and the value specified by\r
+ a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit MSR specified by Index. The\r
value written to the MSR is returned. Extra left bits in both AndData and\r
OrData are stripped. The caller must either guarantee that Index and the data\r
);\r
\r
/**\r
- Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 8-bit I/O port.\r
\r
- Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 8-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
);\r
\r
/**\r
- Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 8-bit I/O port.\r
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 8-bit I/O port.\r
\r
Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
\r
Writes Value to the bit field of the I/O register. The bit field is specified\r
by the StartBit and the EndBit. All other bits in the destination I/O\r
- register are preserved. The value written to the I/O port is returned. Extra\r
- left bits in Value are stripped.\r
+ register are preserved. The value written to the I/O port is returned. \r
\r
If 8-bit I/O port operations are not supported, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 8-bit port.\r
\r
- Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 8-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 8-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
);\r
\r
/**\r
- Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 16-bit I/O port.\r
\r
- Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 16-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
);\r
\r
/**\r
- Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 16-bit I/O port.\r
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 16-bit I/O port.\r
\r
Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 16-bit port.\r
\r
- Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 16-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 16-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
);\r
\r
/**\r
- Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 32-bit I/O port.\r
\r
- Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 32-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
);\r
\r
/**\r
- Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 32-bit I/O port.\r
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 32-bit I/O port.\r
\r
Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 32-bit port.\r
\r
- Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 32-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 32-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
);\r
\r
/**\r
- Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 64-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 64-bit I/O port.\r
\r
- Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
);\r
\r
/**\r
- Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 64-bit I/O port.\r
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 64-bit I/O port.\r
\r
Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 64-bit port.\r
\r
- Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit port.\r
\r
Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
);\r
\r
/**\r
- Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads an 8-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 8-bit MMIO register.\r
\r
- Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 8-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
);\r
\r
/**\r
- Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 8-bit MMIO register.\r
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 8-bit MMIO register.\r
\r
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 8-bit MMIO register.\r
\r
- Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 8-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
8-bit MMIO register.\r
\r
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 8-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
);\r
\r
/**\r
- Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 16-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 16-bit MMIO register.\r
\r
- Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 16-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
);\r
\r
/**\r
- Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 16-bit MMIO register.\r
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 16-bit MMIO register.\r
\r
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 16-bit MMIO register.\r
\r
- Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 16-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
16-bit MMIO register.\r
\r
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 16-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
);\r
\r
/**\r
- Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 32-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 32-bit MMIO register.\r
\r
- Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 32-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
);\r
\r
/**\r
- Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 32-bit MMIO register.\r
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 32-bit MMIO register.\r
\r
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 32-bit MMIO register.\r
\r
- Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 32-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
32-bit MMIO register.\r
\r
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 32-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
);\r
\r
/**\r
- Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 64-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 64-bit MMIO register.\r
\r
- Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 64-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
);\r
\r
/**\r
- Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 64-bit MMIO register.\r
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 64-bit MMIO register.\r
\r
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 64-bit MMIO register.\r
\r
- Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 64-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
64-bit MMIO register.\r
\r
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 64-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 8-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
- followed a bitwise inclusive OR with another 8-bit value.\r
+ followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address,\r
performs a bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 8-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
- followed a bitwise inclusive OR with another 16-bit value.\r
+ followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address,\r
performs a bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 16-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Reads the 16-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 16-bit PCI configuration register specified by Address. \r
\r
If any reserved bits in Address are set, then ASSERT().\r
and writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 16-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
);\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
- followed a bitwise inclusive OR with another 32-bit value.\r
+ followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address,\r
performs a bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
#include "BaseIoLibIntrinsicInternal.h"\r
\r
/**\r
- Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 8-bit I/O port.\r
\r
- Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 8-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 8-bit I/O port.\r
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 8-bit I/O port.\r
\r
Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
\r
Writes Value to the bit field of the I/O register. The bit field is specified\r
by the StartBit and the EndBit. All other bits in the destination I/O\r
- register are preserved. The value written to the I/O port is returned. Extra\r
- left bits in Value are stripped.\r
+ register are preserved. The value written to the I/O port is returned. \r
\r
If 8-bit I/O port operations are not supported, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 8-bit port.\r
\r
- Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 8-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 8-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 16-bit I/O port.\r
\r
- Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 16-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 16-bit I/O port.\r
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 16-bit I/O port.\r
\r
Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 16-bit port.\r
\r
- Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 16-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 16-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 32-bit I/O port.\r
\r
- Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 32-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 32-bit I/O port.\r
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 32-bit I/O port.\r
\r
Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 32-bit port.\r
\r
- Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 32-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 32-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 64-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 64-bit I/O port.\r
\r
- Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 64-bit I/O port.\r
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 64-bit I/O port.\r
\r
Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 64-bit port.\r
\r
- Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit port.\r
\r
Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads an 8-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 8-bit MMIO register.\r
\r
- Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 8-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 8-bit MMIO register.\r
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 8-bit MMIO register.\r
\r
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 8-bit MMIO register.\r
\r
- Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 8-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
8-bit MMIO register.\r
\r
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 8-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 16-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 16-bit MMIO register.\r
\r
- Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 16-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 16-bit MMIO register.\r
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 16-bit MMIO register.\r
\r
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 16-bit MMIO register.\r
\r
- Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 16-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
16-bit MMIO register.\r
\r
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 16-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 32-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 32-bit MMIO register.\r
\r
- Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 32-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 32-bit MMIO register.\r
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 32-bit MMIO register.\r
\r
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 32-bit MMIO register.\r
\r
- Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 32-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
32-bit MMIO register.\r
\r
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 32-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 64-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 64-bit MMIO register.\r
\r
- Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 64-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 64-bit MMIO register.\r
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 64-bit MMIO register.\r
\r
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 64-bit MMIO register.\r
\r
- Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 64-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
64-bit MMIO register.\r
\r
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 64-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 8-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 8-bit value is returned.\r
\r
If 8-bit operations are not supported, then ASSERT().\r
Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 16-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 16-bit value is returned.\r
\r
If 16-bit operations are not supported, then ASSERT().\r
Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 32-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 32-bit value is returned.\r
\r
If 32-bit operations are not supported, then ASSERT().\r
Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
result.\r
\r
- Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+ Performs a bitwise OR between the bit field specified by StartBit\r
and EndBit in Operand and the value specified by OrData. All other bits in\r
Operand are preserved. The new 64-bit value is returned.\r
\r
bitwise OR, and returns the result.\r
\r
Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
- in Operand and the value specified by AndData, followed by a bitwise\r
- inclusive OR with value specified by OrData. All other bits in Operand are\r
+ in Operand and the value specified by AndData, followed by a bitwise \r
+ OR with value specified by OrData. All other bits in Operand are\r
preserved. The new 64-bit value is returned.\r
\r
If 64-bit operations are not supported, then ASSERT().\r
}\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r
+ Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r
writes the result back to the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the lower 32-bits of the read result and the value specified by\r
OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
32-bits of the value written to the MSR is returned. No parameter checking is\r
}\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r
on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
lower 32-bits of the read result and the value specified by AndData\r
- preserving the upper 32-bits, performs a bitwise inclusive OR between the\r
+ preserving the upper 32-bits, performs a bitwise OR between the\r
result of the AND operation and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
written to the MSR is returned. No parameter checking is performed on Index,\r
Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
field is specified by the StartBit and the EndBit. All other bits in the\r
destination MSR are preserved. The lower 32-bits of the MSR written is\r
- returned. Extra left bits in Value are stripped. The caller must either\r
- guarantee that Index and the data written is valid, or the caller must set up\r
- exception handlers to catch the exceptions. This function is only available\r
- on IA-32 and x64.\r
+ returned. The caller must either guarantee that Index and the data written \r
+ is valid, or the caller must set up exception handlers to catch the exceptions. \r
+ This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 31, then ASSERT().\r
If EndBit is greater than 31, then ASSERT().\r
Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
result back to the bit field in the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
written to the MSR are returned. Extra left bits in OrData are stripped. The\r
\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit MSR specified by Index. The\r
lower 32-bits of the value written to the MSR are returned. Extra left bits\r
in both AndData and OrData are stripped. The caller must either guarantee\r
}\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r
+ Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r
back to the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Index. The value written to the MSR is\r
returned. No parameter checking is performed on Index or OrData, and some of\r
}\r
\r
/**\r
- Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
OR, and writes the result back to the 64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
- result and the value specified by AndData, performs a bitwise inclusive OR\r
+ result and the value specified by AndData, performs a bitwise OR\r
between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 64-bit MSR specified by Index. The value written\r
to the MSR is returned. No parameter checking is performed on Index, AndData,\r
\r
Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
the StartBit and the EndBit. All other bits in the destination MSR are\r
- preserved. The MSR written is returned. Extra left bits in Value are\r
- stripped. The caller must either guarantee that Index and the data written is\r
- valid, or the caller must set up exception handlers to catch the exceptions.\r
- This function is only available on IA-32 and x64.\r
+ preserved. The MSR written is returned. The caller must either guarantee \r
+ that Index and the data written is valid, or the caller must set up exception \r
+ handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
\r
If StartBit is greater than 63, then ASSERT().\r
If EndBit is greater than 63, then ASSERT().\r
}\r
\r
/**\r
- Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r
writes the result back to the bit field in the 64-bit MSR.\r
\r
- Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+ Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit MSR specified by Index. The value written to the MSR is\r
returned. Extra left bits in OrData are stripped. The caller must either\r
\r
/**\r
Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit MSR.\r
\r
Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
- a bitwise inclusive OR between the read result and the value specified by\r
+ a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit MSR specified by Index. The\r
value written to the MSR is returned. Extra left bits in both AndData and\r
OrData are stripped. The caller must either guarantee that Index and the data\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
#include <Library/PeiServicesTablePointerLib.h>\r
\r
/**\r
- Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 8-bit I/O port.\r
\r
- Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 8-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 8-bit I/O port.\r
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 8-bit I/O port.\r
\r
Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
\r
Writes Value to the bit field of the I/O register. The bit field is specified\r
by the StartBit and the EndBit. All other bits in the destination I/O\r
- register are preserved. The value written to the I/O port is returned. Extra\r
- left bits in Value are stripped.\r
+ register are preserved. The value written to the I/O port is returned. \r
\r
If 8-bit I/O port operations are not supported, then ASSERT().\r
If StartBit is greater than 7, then ASSERT().\r
Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 8-bit port.\r
\r
- Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 8-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 8-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 16-bit I/O port.\r
\r
- Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 16-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 16-bit I/O port.\r
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 16-bit I/O port.\r
\r
Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 16-bit port.\r
\r
- Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 16-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 16-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 32-bit I/O port.\r
\r
- Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 32-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 32-bit I/O port.\r
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 32-bit I/O port.\r
\r
Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 32-bit port.\r
\r
- Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 32-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 32-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+ Reads a 64-bit I/O port, performs a bitwise OR, and writes the\r
result back to the 64-bit I/O port.\r
\r
- Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
}\r
\r
/**\r
- Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 64-bit I/O port.\r
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 64-bit I/O port.\r
\r
Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
the read result and the value specified by AndData, performs a bitwise OR\r
Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r
result back to the bit field in the 64-bit port.\r
\r
- Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r
between the read result and the value specified by OrData, and writes the\r
result to the 64-bit I/O port specified by Port. The value written to the I/O\r
port is returned. This function must guarantee that all I/O read and write\r
\r
/**\r
Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
64-bit port.\r
\r
Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r
- by a bitwise inclusive OR between the read result and the value specified by\r
+ by a bitwise OR between the read result and the value specified by\r
AndData, and writes the result to the 64-bit I/O port specified by Port. The\r
value written to the I/O port is returned. This function must guarantee that\r
all I/O read and write operations are serialized. Extra left bits in both\r
}\r
\r
/**\r
- Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads an 8-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 8-bit MMIO register.\r
\r
- Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 8-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 8-bit MMIO register.\r
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 8-bit MMIO register.\r
\r
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 8-bit MMIO register.\r
\r
- Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 8-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
8-bit MMIO register.\r
\r
Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 8-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 16-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 16-bit MMIO register.\r
\r
- Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 16-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 16-bit MMIO register.\r
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 16-bit MMIO register.\r
\r
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 16-bit MMIO register.\r
\r
- Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 16-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
16-bit MMIO register.\r
\r
Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 16-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 32-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 32-bit MMIO register.\r
\r
- Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 32-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 32-bit MMIO register.\r
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 32-bit MMIO register.\r
\r
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 32-bit MMIO register.\r
\r
- Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 32-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
32-bit MMIO register.\r
\r
Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 32-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+ Reads a 64-bit MMIO register, performs a bitwise OR, and writes the\r
result back to the 64-bit MMIO register.\r
\r
- Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 64-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized.\r
}\r
\r
/**\r
- Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r
- inclusive OR, and writes the result back to the 64-bit MMIO register.\r
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise \r
+ OR, and writes the result back to the 64-bit MMIO register.\r
\r
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
between the read result and the value specified by AndData, performs a\r
Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r
writes the result back to the bit field in the 64-bit MMIO register.\r
\r
- Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
- inclusive OR between the read result and the value specified by OrData, and\r
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise \r
+ OR between the read result and the value specified by OrData, and\r
writes the result to the 64-bit MMIO register specified by Address. The value\r
written to the MMIO register is returned. This function must guarantee that\r
all MMIO read and write operations are serialized. Extra left bits in OrData\r
\r
/**\r
Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r
- by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+ by a bitwise OR, and writes the result back to the bit field in the\r
64-bit MMIO register.\r
\r
Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
- followed by a bitwise inclusive OR between the read result and the value\r
+ followed by a bitwise OR between the read result and the value\r
specified by AndData, and writes the result to the 64-bit MMIO register\r
specified by Address. The value written to the MMIO register is returned.\r
This function must guarantee that all MMIO read and write operations are\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 8-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,\r
- followed a bitwise inclusive OR with another 8-bit value.\r
+ followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address,\r
performs a bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 8-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,\r
- followed a bitwise inclusive OR with another 16-bit value.\r
+ followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address,\r
performs a bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 16-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Reads the 16-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 16-bit PCI configuration register specified by Address. \r
\r
If any reserved bits in Address are set, then ASSERT().\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address,\r
- performs a bitwise inclusive OR between the read result and the value specified by OrData,\r
+ performs a bitwise OR between the read result and the value specified by OrData,\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,\r
- followed a bitwise inclusive OR with another 32-bit value.\r
+ followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address,\r
performs a bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,\r
+ performs a bitwise OR between the result of the AND operation and the value specified by OrData,\r
and writes the result to the 32-bit PCI configuration register specified by Address.\r
The value written to the PCI configuration register is returned.\r
This function must guarantee that all PCI read and write operations are serialized.\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+ Performs a bitwise OR of an 8-bit PCI configuration register with\r
an 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
- value, followed a bitwise inclusive OR with another 8-bit value.\r
+ value, followed a bitwise OR with another 8-bit value.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 8-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
8-bit port.\r
\r
Reads the 8-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 8-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+ Performs a bitwise OR of a 16-bit PCI configuration register with\r
a 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
- value, followed a bitwise inclusive OR with another 16-bit value.\r
+ value, followed a bitwise OR with another 16-bit value.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 16-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
16-bit port.\r
\r
Reads the 16-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 16-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
}\r
\r
/**\r
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+ Performs a bitwise OR of a 32-bit PCI configuration register with\r
a 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
- value, followed a bitwise inclusive OR with another 32-bit value.\r
+ value, followed a bitwise OR with another 32-bit value.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
bitwise AND between the read result and the value specified by AndData,\r
- performs a bitwise inclusive OR between the result of the AND operation and\r
+ performs a bitwise OR between the result of the AND operation and\r
the value specified by OrData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
writes the result back to the bit field in the 32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise inclusive OR between the read result and the value specified by\r
+ bitwise OR between the read result and the value specified by\r
OrData, and writes the result to the 32-bit PCI configuration register\r
specified by Address. The value written to the PCI configuration register is\r
returned. This function must guarantee that all PCI read and write operations\r
\r
/**\r
Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
- bitwise inclusive OR, and writes the result back to the bit field in the\r
+ bitwise OR, and writes the result back to the bit field in the\r
32-bit port.\r
\r
Reads the 32-bit PCI configuration register specified by Address, performs a\r
- bitwise AND followed by a bitwise inclusive OR between the read result and\r
+ bitwise AND followed by a bitwise OR between the read result and\r
the value specified by AndData, and writes the result to the 32-bit PCI\r
configuration register specified by Address. The value written to the PCI\r
configuration register is returned. This function must guarantee that all PCI\r
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