EmbeddedPkg/Lan9118Dxe: Remove link check in SNP initialization

The UEFI specification does not require the initialisation and reset
interface to check if an Ethernet cable is connected or not, and provides
the GetStatus() interface to do this. Furthermore, the 'Managed Network
Protocol' take care of the cable connection check in edk2 network stack.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16326 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
index 60b8c96dda3e1c2edaefa5cac22fc1598698bbb6..0503dbce1e5536a95dc6b3b2ab8eb81908cce711 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
@@ -283,7 +283,7 @@ SnpInitialize (
   }\r
 \r
   // Initiate a PHY reset\r
-  Status = PhySoftReset (PHY_RESET_PMT | PHY_RESET_CHECK_LINK, Snp);\r
+  Status = PhySoftReset (PHY_RESET_PMT, Snp);\r
   if (EFI_ERROR (Status)) {\r
     Snp->Mode->State = EfiSimpleNetworkStopped;\r
     DEBUG ((EFI_D_WARN, "Warning: Link not ready after TimeOut. Check ethernet cable\n"));\r
@@ -403,7 +403,7 @@ SnpReset (
   }\r
 \r
   // Initiate a PHY reset\r
-  Status = PhySoftReset (PHY_RESET_PMT | PHY_RESET_CHECK_LINK, Snp);\r
+  Status = PhySoftReset (PHY_RESET_PMT, Snp);\r
   if (EFI_ERROR (Status)) {\r
     Snp->Mode->State = EfiSimpleNetworkStopped;\r
     return EFI_NOT_STARTED;\r

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
index 301c42ff18fd16bf46f4543c80365d689313b0e6..9531b0ba2a463f6c9896a211b104f4d531ec004c 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
@@ -491,7 +491,6 @@ PhySoftReset (
   )\r
 {\r
   UINT32 PmtCtrl = 0;\r
-  UINT32 LinkTo = 0;\r
 \r
   // PMT PHY reset takes precedence over BCR\r
   if (Flags & PHY_RESET_PMT) {\r
@@ -513,20 +512,6 @@ PhySoftReset (
     }\r
   }\r
 \r
-  // Check the link status\r
-  if (Flags & PHY_RESET_CHECK_LINK) {\r
-    LinkTo = 100000; // 2 second (could be 50% more)\r
-    while (EFI_ERROR (CheckLinkStatus (0, Snp)) && (LinkTo > 0)) {\r
-      gBS->Stall (LAN9118_STALL);\r
-      LinkTo--;\r
-    }\r
-\r
-    // Timed out\r
-    if (LinkTo <= 0) {\r
-      return EFI_TIMEOUT;\r
-    }\r
-  }\r
-\r
   // Clear and acknowledge all interrupts\r
   if (Flags & PHY_SOFT_RESET_CLEAR_INT) {\r
     MmioWrite32 (LAN9118_INT_EN, 0);\r

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.h b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.h
index 5bc4501c1ad346c0d20628356b37445b53e27467..424bdc5a85ca06f84437aae2aa4ec4bb4ace60f9 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.h
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.h
@@ -115,8 +115,7 @@ SoftReset (
 // Flags for PHY reset\r
 #define PHY_RESET_PMT                                   BIT0\r
 #define PHY_RESET_BCR                                   BIT1\r
-#define PHY_RESET_CHECK_LINK                            BIT2\r
-#define PHY_SOFT_RESET_CLEAR_INT                        BIT3\r
+#define PHY_SOFT_RESET_CLEAR_INT                        BIT2\r
 \r
 // Perform PHY software reset\r
 EFI_STATUS\r