]> git.proxmox.com Git - mirror_edk2.git/commitdiff
ArmPlatformPkg: Add support for PrePi module
authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Fri, 1 Jul 2011 14:33:26 +0000 (14:33 +0000)
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Fri, 1 Jul 2011 14:33:26 +0000 (14:33 +0000)
This module is enabled for ArmRealViewEb and ArmvExpress builds
when the macro EDK2_SKIP_PEICORE is passed to the build system.

The PrePi module can be used when the DRAM has already been initialized
by the SEC phase/1st stage boot loader and no call to external PEIM is
required.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11953 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-MPCore.fdf
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-UniCore.fdf
ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
ArmPlatformPkg/Sec/Sec.c

index ba2681c886fc12fee5b8c1a46543c0ff2015c00d..f86730cbb98f9450779da74101e29b9dce795813 100644 (file)
   # ARM PL390 General Interrupt Driver in Secure and Non-secure\r
   PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf\r
 \r
+!if $(EDK2_SKIP_PEICORE) == 1\r
+  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf\r
+  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf\r
+  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
+  MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf\r
+  HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf\r
+  PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf\r
+  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf\r
+  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf\r
+!endif\r
+\r
 [LibraryClasses.common.PEI_CORE]\r
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf\r
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
 # SEC\r
 #\r
   ArmPlatformPkg/Sec/Sec.inf\r
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf\r
   \r
 #\r
 # PEI Phase modules\r
 #\r
+!if $(EDK2_SKIP_PEICORE) == 1\r
+  ArmPlatformPkg/PrePi/PeiUniCore.inf {\r
+    <LibraryClasses>\r
+      ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf\r
+      ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf\r
+  }\r
+!else\r
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf\r
   MdeModulePkg/Core/Pei/PeiMain.inf\r
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {\r
     <LibraryClasses>\r
       PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
   }\r
-  ArmPlatformPkg/PlatformPei/PlatformPei.inf\r
-  ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf\r
+  ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
+  ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
   IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
   Nt32Pkg/BootModePei/BootModePei.inf\r
   MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
     <LibraryClasses>\r
       NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf\r
   }\r
+!endif\r
 \r
 #\r
 # DXE\r
index 9ff68659ce50f099fa58cfddc83dfcdf12710a48..64f5b552cd28e6426c7de6d0f1fbf2670062cba6 100644 (file)
   PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
   PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
 
+!if $(EDK2_SKIP_PEICORE) == 1
+  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+  MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
+  HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
+  PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+!endif
+
 [LibraryClasses.common.PEI_CORE]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
 # SEC
 #
   ArmPlatformPkg/Sec/Sec.inf
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
   
 #
 # PEI Phase modules
 #
+!if $(EDK2_SKIP_PEICORE) == 1
+  ArmPlatformPkg/PrePi/PeiMPCore.inf{
+    <LibraryClasses>
+      ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
+      ArmPlatformLib|ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
+  }
+!else
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
   MdeModulePkg/Core/Pei/PeiMain.inf
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {
     <LibraryClasses>
       PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   }
-  ArmPlatformPkg/PlatformPei/PlatformPei.inf
-  ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
+  ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
   IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
   Nt32Pkg/BootModePei/BootModePei.inf
   MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
     <LibraryClasses>
       NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
   }
+!endif
 
 #
 # DXE
index 6e639fc8a06a87cb9a27ae2b090c955d29255d3d..2a3214a3534a9a43cd341f35cadff6dc408919d7 100644 (file)
@@ -187,22 +187,25 @@ READ_STATUS        = TRUE
 READ_LOCK_CAP      = TRUE
 READ_LOCK_STATUS   = TRUE
 
+!if $(EDK2_SKIP_PEICORE) == 1
+  INF ArmPlatformPkg/PrePi/PeiMPCore.inf
+!else
   INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
   INF MdeModulePkg/Core/Pei/PeiMain.inf
-  INF ArmPlatformPkg/PlatformPei/PlatformPei.inf
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
   INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
   INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
   INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
-  
+!endif
+
   FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
     SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
       SECTION FV_IMAGE = FVMAIN
     }
   }
 
-
 ################################################################################
 #
 # Rules are use with the [FV] section's module INF type to define
index 763437726253f77ffcbdc9b5c063a3468a00f1a3..a24a5a25cea83e29402fbddfb4358123fe0792fe 100644 (file)
@@ -187,22 +187,25 @@ READ_STATUS        = TRUE
 READ_LOCK_CAP      = TRUE\r
 READ_LOCK_STATUS   = TRUE\r
 \r
+!if $(EDK2_SKIP_PEICORE) == 1\r
+  INF ArmPlatformPkg/PrePi/PeiUniCore.inf\r
+!else\r
   INF ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf\r
   INF MdeModulePkg/Core/Pei/PeiMain.inf\r
-  INF ArmPlatformPkg/PlatformPei/PlatformPei.inf\r
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf\r
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf\r
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf\r
   INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
   INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
   INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
-  \r
+!endif\r
+\r
   FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
     SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
       SECTION FV_IMAGE = FVMAIN\r
     }\r
   }\r
 \r
-\r
 ################################################################################\r
 #\r
 # Rules are use with the [FV] section's module INF type to define\r
index 82089985b14e613d5cf6d5856726f7cfdf5e0613..48c64b1cba19f436f44fc184a8efcceaafc29637 100644 (file)
   # ARM PL390 General Interrupt Driver in Secure and Non-secure
   PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
   PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
+  
+!if $(EDK2_SKIP_PEICORE) == 1
+  PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+  ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+  LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+  MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf
+  HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf
+  PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf
+  PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+  PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf
+  MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+!endif
 
 [LibraryClasses.common.PEI_CORE]
   BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000     # Top of SEC Stack for Normal World
   gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x00020000     # Stack for each of the 4 CPU cores
 
-
   # System Memory (1GB) 
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x60000000
   gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
 # SEC
 #
   ArmPlatformPkg/Sec/Sec.inf
-  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
   
 #
 # PEI Phase modules
 #
+!if $(EDK2_SKIP_PEICORE) == 1
+  ArmPlatformPkg/PrePi/PeiMPCore.inf {
+    <LibraryClasses>
+      ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
+      ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
+  }
+!else
+  ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
   MdeModulePkg/Core/Pei/PeiMain.inf
   MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {
     <LibraryClasses>
       PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   }
-  ArmPlatformPkg/PlatformPei/PlatformPei.inf
-  ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
+  ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
   IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
   Nt32Pkg/BootModePei/BootModePei.inf
   MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
     <LibraryClasses>
       NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
   }
+!endif
 
 #
 # DXE
index 55e4e073ea3b90879c1294b3f5fbac2bd956df3a..6781f5e974ad4ff682899c3bd308f5109a9ed78a 100644 (file)
@@ -219,14 +219,18 @@ READ_STATUS        = TRUE
 READ_LOCK_CAP      = TRUE
 READ_LOCK_STATUS   = TRUE
 
+!if $(EDK2_SKIP_PEICORE) == 1
+  INF ArmPlatformPkg/PrePi/PeiMPCore.inf
+!else
   INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
   INF MdeModulePkg/Core/Pei/PeiMain.inf
-  INF ArmPlatformPkg/PlatformPei/PlatformPei.inf
-  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPei.inf
+  INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
+  INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
   INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
   INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
   INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
   INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+!endif
   
   FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
     SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
index faa012ab406c4487d4621fb1050af161b1903bf5..8ddc654c24a4e245c44d954a98f219c494de476a 100644 (file)
@@ -227,6 +227,18 @@ CEntryPoint (
       // Enter Secondary Cores into non Secure State. To enter into Non Secure state, we need to make a return from exception
       return_from_exception((UINTN)NonSecureWaitForFirmware);
     }
+  } else if (FeaturePcdGet(PcdSkipPeiCore)) {
+    if (CoreId == ARM_PRIMARY_CORE) {
+      // Signal the secondary cores they can jump to PEI phase
+      PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
+
+      // To enter into Non Secure state, we need to make a return from exception
+      return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
+    } else {
+      // We wait for the primary core to finish to initialize the System Memory. When we skip PEI Core, we could set the stack in DRAM
+      // Without this synchronization the secondary cores will complete the SEC before the primary core has finished to intitialize the DRAM.
+      return_from_exception((UINTN)NonSecureWaitForFirmware);
+    }
   } else {
     // To enter into Non Secure state, we need to make a return from exception
     return_from_exception(PcdGet32(PcdNormalFvBaseAddress));