@param OpCode Expected OpCode\r
@param SubOpCode Expected SubOpCode\r
\r
- @retval TURE This handle has expected opcode\r
+ @retval TRUE This handle has expected opcode\r
@retval FALSE This handle does not have expected opcode\r
**/\r
BOOLEAN\r
@param Name Expected name\r
@param Value Expected name value\r
\r
- @retval TURE This handle has expected name and name value.\r
+ @retval TRUE This handle has expected name and name value.\r
@retval FALSE This handle does not have expected name and name value.\r
**/\r
BOOLEAN\r
@param Name Expected name\r
@param Value Expected name value\r
\r
- @retval TURE This handle's children has expected name and name value.\r
+ @retval TRUE This handle's children has expected name and name value.\r
@retval FALSE This handle's children does not have expected name and name value.\r
**/\r
BOOLEAN\r
This driver is dispatched by Dxe core and the driver will reload itself to ACPI NVS memory\r
in the entry point. The functionality is to interpret and restore the S3 boot script\r
\r
-Copyright (c) 2013-2015 Intel Corporation.\r
+Copyright (c) 2013-2016 Intel Corporation.\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
}\r
ImageContext.ImageAddress = (PHYSICAL_ADDRESS)(UINTN)FfsBuffer;\r
//\r
- // Align buffer on section boundry\r
+ // Align buffer on section boundary\r
//\r
ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
ImageContext.ImageAddress &= ~(ImageContext.SectionAlignment - 1);\r
\r
This is QNC Smm platform driver\r
\r
-Copyright (c) 2013-2015 Intel Corporation.\r
+Copyright (c) 2013-2016 Intel Corporation.\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
/*++\r
\r
Routine Description:\r
- SMI handler to retore QncS3 code & context for S3 path\r
+ SMI handler to restore QncS3 code & context for S3 path\r
This will be only triggered when BootScript got executed during resume\r
\r
Arguments:\r
SaveBarReg = PciRead32 (DevPcieAddr + R_IOH_MAC_MEMBAR);\r
\r
//\r
- // Use predefined tempory memory resource\r
+ // Use predefined temporary memory resource\r
//\r
PciWrite32 ( DevPcieAddr + R_IOH_MAC_MEMBAR, Bar0);\r
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);\r
\r
//\r
// Check if RMU reset system due to access violations.\r
- // RMU updates a SOC Unit register before reseting the system.\r
+ // RMU updates a SOC Unit register before resetting the system.\r
//\r
RegValue = QNCAltPortRead (QUARK_SCSS_SOC_UNIT_SB_PORT_ID, QUARK_SCSS_SOC_UNIT_CFG_STICKY_RW);\r
if ((RegValue & B_CFG_STICKY_RW_VIOLATION) != 0) {\r
SaveBarReg = PciRead32 (DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister));\r
\r
//\r
- // Use predefined tempory memory resource.\r
+ // Use predefined temporary memory resource.\r
//\r
PciWrite32 ( DevPcieAddr + PcdGet8 (PcdIohGpioBarRegister), IohGpioBase);\r
PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);\r