ArmPkg/ArmV7Mmu: introduce feature PCD to map normal memory non-shareable

Even though mapping normal memory (inner) shareable is usually the
correct choice on coherent systems, it may be desirable in some cases
to use non-shareable mappings for normal memory, e.g., when hardware
managed coherency is not required and the memory system is not fully
configured yet. So introduce a PCD PcdNormalMemoryNonshareableOverride
that makes cacheable mappings of normal memory non-shareable.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18897 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 46e9894d3f56316fead02067f8489b01c7769817..ff4531e44106361002750d0ebd742f92de871049 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -73,6 +73,12 @@
   # Define if the GICv3 controller should use the GICv2 legacy\r
   gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042\r
 \r
+[PcdsFeatureFlag.ARM]\r
+  # Whether to map normal memory as non-shareable. FALSE is the safe choice, but\r
+  # TRUE may be appropriate to fix performance problems if you don't care about\r
+  # hardware coherency (i.e., no virtualization or cache coherent DMA)\r
+  gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043\r
+\r
 [PcdsFixedAtBuild.common]\r
   gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006\r
 \r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
index 01bdfb6996569fdd1189b1c9513358f38fc534f4..d56851a1409ba91a94055c728f04dccc8a141bf5 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
@@ -48,3 +48,6 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
+\r
+[FeaturePcd.ARM]\r
+  gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
index ac081068db286a0849f135ba415945144a36d709..6eaf350c7b9d63c83a2c0e330665838f5db88d6f 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
@@ -48,3 +48,6 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
+\r
+[FeaturePcd.ARM]\r
+  gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index f03f609d21b2605dfba18c1ba5681c50c91cd830..a9cb06d78e19d93f94908476cee814e35c8365a2 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -80,6 +80,10 @@ PopulateLevel2PageTable (
       break;\r
   }\r
 \r
+  if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {\r
+    PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;\r
+  }\r
+\r
   // Check if the Section Entry has already been populated. Otherwise attach a\r
   // Level 2 Translation Table to it\r
   if (*SectionEntry != 0) {\r
@@ -178,6 +182,10 @@ FillTranslationTable (
       break;\r
   }\r
 \r
+  if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {\r
+    Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;\r
+  }\r
+\r
   // Get the first section entry for this mapping\r
   SectionEntry    = TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(TranslationTable, MemoryRegion->VirtualBase);\r
 \r
@@ -266,15 +274,19 @@ ArmConfigureMmu (
   }\r
 \r
   if (TTBRAttributes & TTBR_SHAREABLE) {\r
-    //\r
-    // Unlike the S bit in the short descriptors, which implies inner shareable\r
-    // on an implementation that supports two levels, the meaning of the S bit\r
-    // in the TTBR depends on the NOS bit, which defaults to Outer Shareable.\r
-    // However, we should only set this bit after we have confirmed that the\r
-    // implementation supports multiple levels, or else the NOS bit is UNK/SBZP\r
-    //\r
-    if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {\r
-      TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;\r
+    if (FeaturePcdGet(PcdNormalMemoryNonshareableOverride)) {\r
+      TTBRAttributes ^= TTBR_SHAREABLE;\r
+    } else {\r
+      //\r
+      // Unlike the S bit in the short descriptors, which implies inner shareable\r
+      // on an implementation that supports two levels, the meaning of the S bit\r
+      // in the TTBR depends on the NOS bit, which defaults to Outer Shareable.\r
+      // However, we should only set this bit after we have confirmed that the\r
+      // implementation supports multiple levels, or else the NOS bit is UNK/SBZP\r
+      //\r
+      if (((ArmReadIdMmfr0 () >> 12) & 0xf) != 0) {\r
+        TTBRAttributes |= TTBR_NOT_OUTER_SHAREABLE;\r
+      }\r
     }\r
   }\r
 \r