ArmPkg/ArmGicDxe ARM: fix encoding for GICv3 interrupt acknowledge
authorArd Biesheuvel <ard.biesheuvel@linaro.org>
Wed, 14 Nov 2018 19:27:24 +0000 (11:27 -0800)
committerArd Biesheuvel <ard.biesheuvel@linaro.org>
Thu, 15 Nov 2018 12:33:07 +0000 (04:33 -0800)
Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
the wrong system register encoding to access ICC_IAR1, and attempted
to access ICC_IAR0 instead. This results in boot time hangs both
under QEMU emulation and on real hardware.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S
ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm

index a72f3c8..c308d2f 100644 (file)
@@ -66,7 +66,7 @@ ASM_FUNC(ArmGicV3EndOfInterrupt)
 //  VOID\r
 //  );\r
 ASM_FUNC(ArmGicV3AcknowledgeInterrupt)\r
-        mrc     p15, 0, r0, c12, c8, 0 //ICC_IAR1\r
+        mrc     p15, 0, r0, c12, c12, 0 //ICC_IAR1\r
         bx      lr\r
 \r
 //VOID\r
index 4228fb5..222047d 100644 (file)
@@ -66,7 +66,7 @@
 //  VOID\r
 //  );\r
  RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt\r
-        mrc     p15, 0, r0, c12, c8, 0 //ICC_IAR1\r
+        mrc     p15, 0, r0, c12, c12, 0 //ICC_IAR1\r
         bx      lr\r
 \r
 //VOID\r