UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr3" with PatchInstructionX86()

Rename the variable to "gPatchSmmCr3" so that its association with
PatchInstructionX86() is clear from the declaration, change its type to
X86_ASSEMBLY_PATCH_LABEL, and patch it with PatchInstructionX86(). This
lets us remove the binary (DB) encoding of some instructions in
"SmmInit.nasm".

Cc: Eric Dong <eric.dong@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=866
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index d64fcd48d03ed8820c4a0eab069c58ec35d5b7e4..f7bb9b9a82e52f216f8e1e21cdd5f991b449eba8 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -22,7 +22,7 @@ extern ASM_PFX(SmmInitHandler)
 extern ASM_PFX(mRebasedFlag)\r
 extern ASM_PFX(mSmmRelocationOriginalAddress)\r
 \r
-global ASM_PFX(gSmmCr3)\r
+global ASM_PFX(gPatchSmmCr3)\r
 global ASM_PFX(gSmmCr4)\r
 global ASM_PFX(gSmmCr0)\r
 global ASM_PFX(gSmmJmpAddr)\r
@@ -49,8 +49,8 @@ ASM_PFX(SmmStartup):
     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.\r
     and     ebx, BIT20                  ; extract NX capability bit\r
     shr     ebx, 9                      ; shift bit to IA32_EFER.NXE[BIT11] position\r
-    DB      0x66, 0xb8                  ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
     mov     cr3, eax\r
 o32 lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
     DB      0x66, 0xb8                  ; mov eax, imm32\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index a27d1f4684f5cc0e0d2b601544cba445d5469714..c5b67e3dc0ce4892471d8a5818928a97d6473b64 100755 (executable)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -406,7 +406,7 @@ SmmRelocateBases (
   // Patch ASM code template with current CR0, CR3, and CR4 values\r
   //\r
   gSmmCr0 = (UINT32)AsmReadCr0 ();\r
-  gSmmCr3 = (UINT32)AsmReadCr3 ();\r
+  PatchInstructionX86 (gPatchSmmCr3, AsmReadCr3 (), 4);\r
   gSmmCr4 = (UINT32)AsmReadCr4 ();\r
 \r
   //\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index f91ddd35d2047bf651cc637fe83fc662597612e7..a01d0d76d6ff2010638b83335158278155243dcf 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -309,7 +309,7 @@ extern IA32_FAR_ADDRESS             gSmmJmpAddr;
 extern CONST UINT8                  gcSmmInitTemplate[];\r
 extern CONST UINT16                 gcSmmInitSize;\r
 extern UINT32                       gSmmCr0;\r
-extern UINT32                       gSmmCr3;\r
+X86_ASSEMBLY_PATCH_LABEL            gPatchSmmCr3;\r
 extern UINT32                       gSmmCr4;\r
 extern UINTN                        gSmmInitStack;\r
 \r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
index 2eaf1433dcd651d72c297213ee2c05fcdcd2f4ba..2df22a1f6cd1591a8aef3100d0de46c93809b731 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
@@ -22,7 +22,7 @@ extern ASM_PFX(SmmInitHandler)
 extern ASM_PFX(mRebasedFlag)\r
 extern ASM_PFX(mSmmRelocationOriginalAddress)\r
 \r
-global ASM_PFX(gSmmCr3)\r
+global ASM_PFX(gPatchSmmCr3)\r
 global ASM_PFX(gSmmCr4)\r
 global ASM_PFX(gSmmCr0)\r
 global ASM_PFX(gSmmJmpAddr)\r
@@ -47,8 +47,8 @@ ASM_PFX(SmmStartup):
     mov     eax, 0x80000001             ; read capability\r
     cpuid\r
     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.\r
-    DB      0x66, 0xb8                   ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
     mov     cr3, eax\r
 o32 lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
     DB      0x66, 0xb8                   ; mov eax, imm32\r