]> git.proxmox.com Git - mirror_edk2.git/commitdiff
UefiCpuPkg/PiSmmCpuDxeSmm: Add MemoryMapped in SetProcessorRegister()
authorJeff Fan <jeff.fan@intel.com>
Wed, 29 Jun 2016 01:00:13 +0000 (09:00 +0800)
committerMichael Kinney <michael.d.kinney@intel.com>
Thu, 14 Jul 2016 15:57:47 +0000 (08:57 -0700)
REGISTER_TYPE in UefiCpuPkg/Include/AcpiCpuData.h defines a MemoryMapped
enum value.  However support for the MemoryMapped enum is missing from
the implementation of SetProcessorRegister().  This patch adds support
for MemoryMapped type SetProcessorRegister().

One spin lock is added to avoid potential conflict when multiple processor
update the same memory space.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h

index 5e63f8aab292c7efb88532439e4e4036d14e5df0..4c995ec27068e92d7a4ac19335fe6c929641ba44 100644 (file)
@@ -34,6 +34,11 @@ typedef struct {
   UINTN LongJumpOffset;\r
 } MP_ASSEMBLY_ADDRESS_MAP;\r
 \r
+//\r
+// Spin lock used to serialize MemoryMapped operation\r
+//\r
+SPIN_LOCK                *mMemoryMappedLock = NULL;\r
+\r
 /**\r
   Get starting address and size of the rendezvous entry for APs.\r
   Information for fixing a jump instruction in the code is also returned.\r
@@ -284,6 +289,19 @@ SetProcessorRegister (
       }\r
       break;\r
     //\r
+    // MemoryMapped operations\r
+    //\r
+    case MemoryMapped:\r
+      AcquireSpinLock (mMemoryMappedLock);\r
+      MmioBitFieldWrite32 (\r
+        RegisterTableEntry->Index,\r
+        RegisterTableEntry->ValidBitStart,\r
+        RegisterTableEntry->ValidBitStart + RegisterTableEntry->ValidBitLength - 1,\r
+        (UINT32)RegisterTableEntry->Value\r
+        );\r
+      ReleaseSpinLock (mMemoryMappedLock);\r
+      break;\r
+    //\r
     // Enable or disable cache\r
     //\r
     case CacheControl:\r
index 62d037cdb17867b82a20a3c16c7dfbee9e485cf6..5ba0514a3536fda03d6be79b31b4969d46cb720e 100644 (file)
@@ -1239,6 +1239,10 @@ InitializeSmmCpuSemaphores (
   SemaphoreAddr += SemaphoreSize;\r
   mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock\r
                                                   = (SPIN_LOCK *)SemaphoreAddr;\r
+  SemaphoreAddr += SemaphoreSize;\r
+  mSmmCpuSemaphores.SemaphoreGlobal.MemoryMappedLock\r
+                                                  = (SPIN_LOCK *)SemaphoreAddr;\r
+\r
   SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize;\r
   mSmmCpuSemaphores.SemaphoreCpu.Busy    = (SPIN_LOCK *)SemaphoreAddr;\r
   SemaphoreAddr += ProcessorCount * SemaphoreSize;\r
@@ -1254,6 +1258,7 @@ InitializeSmmCpuSemaphores (
 \r
   mPFLock                       = mSmmCpuSemaphores.SemaphoreGlobal.PFLock;\r
   mConfigSmmCodeAccessCheckLock = mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock;\r
+  mMemoryMappedLock             = mSmmCpuSemaphores.SemaphoreGlobal.MemoryMappedLock;\r
 \r
   mSemaphoreSize = SemaphoreSize;\r
 }\r
index 8b3bb343ce10e4d1bc59c7675107c0aa65131a8d..0858d8f4d7cec6951d0402ea867c42566a1bd1be 100644 (file)
@@ -485,6 +485,8 @@ SmmRestoreCpu (
 \r
   DEBUG ((EFI_D_INFO, "SmmRestoreCpu()\n"));\r
 \r
+  InitializeSpinLock (mMemoryMappedLock);\r
+\r
   //\r
   // See if there is enough context to resume PEI Phase\r
   //\r
index b6c57e3f169f02ea9ddf5fa396e2045695d29983..bf31e9e4184dec0329fe20cbbad528be29d5131b 100644 (file)
@@ -366,6 +366,7 @@ typedef struct {
   volatile BOOLEAN     *AllCpusInSync;\r
   SPIN_LOCK            *PFLock;\r
   SPIN_LOCK            *CodeAccessCheckLock;\r
+  SPIN_LOCK            *MemoryMappedLock;\r
 } SMM_CPU_SEMAPHORE_GLOBAL;\r
 \r
 ///\r
@@ -413,6 +414,7 @@ extern SMM_CPU_SEMAPHORES                  mSmmCpuSemaphores;
 extern UINTN                               mSemaphoreSize;\r
 extern SPIN_LOCK                           *mPFLock;\r
 extern SPIN_LOCK                           *mConfigSmmCodeAccessCheckLock;\r
+extern SPIN_LOCK                           *mMemoryMappedLock;\r
 \r
 /**\r
   Create 4G PageTable in SMRAM.\r