UefiCpuPkg/CpuCommonFeaturesLib: Remove XD enable/disable logic

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2329

XD (ExecutionDisable) feature, when turned on, allows page table
entry BIT63 set to 1 indicating the memory pointed by the page table
is disallowed to execute.
DxeIpl::CreateIdentityMappingPageTables() enables the XD when CPU
supports it.
Later DxeCore modifies the page table to set the BIT63 to protect
the stack/heap to disallow code execution in stack/heap.

UefiCpuPkg/CpuCommonFeaturesLib enables/disables the XD feature
according to PcdCpuFeaturesSetting.
When XD is disabled, GP fault is generated immediately because some
page entries have BIT63 set.

To fix this issue, this patch removes the XD feature logic from
UefiCpuPkg/CpuCommonFeaturesLib so the XD feature is only taken
care of by DxeIpl.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
index 238632f88af754b08c21c6e22c164879ec3235e8..3ebd9392a9e4ea355c67bbe6d10a3179a4adf118 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.c
@@ -66,17 +66,6 @@ CpuCommonFeaturesLibConstructor (
                );\r
     ASSERT_EFI_ERROR (Status);\r
   }\r
-  if (IsCpuFeatureSupported (CPU_FEATURE_XD)) {\r
-    Status = RegisterCpuFeature (\r
-               "Execute Disable",\r
-               NULL,\r
-               ExecuteDisableSupport,\r
-               ExecuteDisableInitialize,\r
-               CPU_FEATURE_XD,\r
-               CPU_FEATURE_END\r
-               );\r
-    ASSERT_EFI_ERROR (Status);\r
-  }\r
   if (IsCpuFeatureSupported (CPU_FEATURE_FASTSTRINGS)) {\r
     Status = RegisterCpuFeature (\r
                "FastStrings",\r

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
index 6347c8997d56d79eabd78dcd3d3995cd2b52de67..7fbcd8da0e5721ae49049711751ff41cce374f3c 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
@@ -4,7 +4,7 @@
 #  This library registers CPU features defined in Intel(R) 64 and IA-32\r
 #  Architectures Software Developer's Manual.\r
 #\r
-# Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
@@ -34,7 +34,6 @@
   C1e.c\r
   ClockModulation.c\r
   Eist.c\r
-  ExecuteDisable.c\r
   FastStrings.c\r
   FeatureControl.c\r
   LimitCpuIdMaxval.c\r

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c
deleted file mode 100644 (file)
index 75ea163..0000000
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ExecuteDisable.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/** @file\r
-  Execute Disable feature.\r
-\r
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
-  SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include "CpuCommonFeatures.h"\r
-\r
-/**\r
-  Detects if Execute Disable feature supported on current processor.\r
-\r
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.\r
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
-                               structure for the CPU executing this function.\r
-  @param[in]  ConfigData       A pointer to the configuration buffer returned\r
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if\r
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
-                               RegisterCpuFeature().\r
-\r
-  @retval TRUE     Execute Disable feature is supported.\r
-  @retval FALSE    Execute Disable feature is not supported.\r
-\r
-  @note This service could be called by BSP/APs.\r
-**/\r
-BOOLEAN\r
-EFIAPI\r
-ExecuteDisableSupport (\r
-  IN UINTN                             ProcessorNumber,\r
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,\r
-  IN VOID                              *ConfigData  OPTIONAL\r
-  )\r
-{\r
-  UINT32                         Eax;\r
-  CPUID_EXTENDED_CPU_SIG_EDX     Edx;\r
-\r
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
-  if (Eax <= CPUID_EXTENDED_FUNCTION) {\r
-    //\r
-    // Extended CPUID functions are not supported on this processor.\r
-    //\r
-    return FALSE;\r
-  }\r
-\r
-  AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
-  return (Edx.Bits.NX != 0);\r
-}\r
-\r
-/**\r
-  Initializes Execute Disable feature to specific state.\r
-\r
-  @param[in]  ProcessorNumber  The index of the CPU executing this function.\r
-  @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION\r
-                               structure for the CPU executing this function.\r
-  @param[in]  ConfigData       A pointer to the configuration buffer returned\r
-                               by CPU_FEATURE_GET_CONFIG_DATA.  NULL if\r
-                               CPU_FEATURE_GET_CONFIG_DATA was not provided in\r
-                               RegisterCpuFeature().\r
-  @param[in]  State            If TRUE, then the Execute Disable feature must be enabled.\r
-                               If FALSE, then the Execute Disable feature must be disabled.\r
-\r
-  @retval RETURN_SUCCESS       Execute Disable feature is initialized.\r
-\r
-  @note This service could be called by BSP only.\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-ExecuteDisableInitialize (\r
-  IN UINTN                             ProcessorNumber,\r
-  IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,\r
-  IN VOID                              *ConfigData,  OPTIONAL\r
-  IN BOOLEAN                           State\r
-  )\r
-{\r
-  //\r
-  // The scope of the MSR_IA32_EFER is core for below processor type, only program\r
-  // MSR_IA32_EFER for thread 0 in each core.\r
-  //\r
-  if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
-    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
-      return RETURN_SUCCESS;\r
-    }\r
-  }\r
-\r
-  CPU_REGISTER_TABLE_WRITE_FIELD (\r
-    ProcessorNumber,\r
-    Msr,\r
-    MSR_IA32_EFER,\r
-    MSR_IA32_EFER_REGISTER,\r
-    Bits.NXE,\r
-    (State) ? 1 : 0\r
-    );\r
-  return RETURN_SUCCESS;\r
-}\r