ArmPkg: remove cache maintenance by VA operation range size threshold

This removes the range size threshold for virtual address based cache
maintenance instructions that operate on VA ranges to be 'promoted' to
use set/way instructions.

Doing so is unsafe: set/way operations are fundamentally different
from VA operations, and really only suitable for cleaning or invalidating
a cache when turning it on or off.

To quote the ARM ARM (DDI0487A_d G3.4):
"""
Since the set/way instructions are performed only locally, there is no
guarantee of the atomicity of cache maintenance between different PEs,
even if those different PEs are each performing the same cache maintenance
instructions at the same time. Since any cacheable line can be allocated
into the cache at any time, it is possible for [a] cache line to migrate
from an entry in the cache of one PE to the cache of a different PE in a
manner that the cache line avoids being affected by set/way based cache
maintenance. Therefore, ARM strongly discourages the use of set/way
instructions to manage coherency in coherent systems.
"""

Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Olivier Martin <Olivier.Martin@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17176 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 87dbd11b867fa9097255175758a33e29d15dbbc9..b30de9152c1335a0cb81dd0acfe614fea725ad03 100644 (file)
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -82,8 +82,7 @@
   gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000080000000|UINT64|0x00000002\r
   # This PCD will free the unallocated buffers if their size reach this threshold.\r
   # We set the default value to 512MB.\r
-  gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000043\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold|1024|UINT32|0x00000003\r
+  gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003\r
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT32|0x00000004\r
   gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005\r
 \r

diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
index 8501e5c613c7b5e84b4f80112b0958a80a35aacd..d8e53df6096ee93d37239e0ab0214fdd6a88a40f 100644 (file)
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c
@@ -20,27 +20,20 @@ VOID
 CacheRangeOperation (\r
   IN  VOID            *Start,\r
   IN  UINTN           Length,\r
-  IN  CACHE_OPERATION CacheOperation,\r
   IN  LINE_OPERATION  LineOperation\r
   )\r
 {\r
   UINTN ArmCacheLineLength         = ArmDataCacheLineLength();\r
   UINTN ArmCacheLineAlignmentMask  = ArmCacheLineLength - 1;\r
-  UINTN ArmCacheOperationThreshold = PcdGet32(PcdArmCacheOperationThreshold);\r
 \r
-  if ((CacheOperation != NULL) && (Length >= ArmCacheOperationThreshold)) {\r
-    ArmDrainWriteBuffer ();\r
-    CacheOperation ();\r
-  } else {\r
-    // Align address (rounding down)\r
-    UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
-    UINTN EndAddress     = (UINTN)Start + Length;\r
+  // Align address (rounding down)\r
+  UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);\r
+  UINTN EndAddress     = (UINTN)Start + Length;\r
 \r
-    // Perform the line operation on an address in each cache line\r
-    while (AlignedAddress < EndAddress) {\r
-      LineOperation(AlignedAddress);\r
-      AlignedAddress += ArmCacheLineLength;\r
-    }\r
+  // Perform the line operation on an address in each cache line\r
+  while (AlignedAddress < EndAddress) {\r
+    LineOperation(AlignedAddress);\r
+    AlignedAddress += ArmCacheLineLength;\r
   }\r
 }\r
 \r
@@ -70,7 +63,7 @@ InvalidateInstructionCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation (Address, Length, ArmCleanDataCacheToPoU, ArmCleanDataCacheEntryByMVA);\r
+  CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryByMVA);\r
   ArmInvalidateInstructionCache ();\r
   return Address;\r
 }\r
@@ -91,7 +84,7 @@ WriteBackInvalidateDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCache, ArmCleanInvalidateDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA);\r
   return Address;\r
 }\r
 \r
@@ -111,7 +104,7 @@ WriteBackDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, ArmCleanDataCache, ArmCleanDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA);\r
   return Address;\r
 }\r
 \r
@@ -122,6 +115,6 @@ InvalidateDataCacheRange (
   IN      UINTN                     Length\r
   )\r
 {\r
-  CacheRangeOperation(Address, Length, NULL, ArmInvalidateDataCacheEntryByMVA);\r
+  CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA);\r
   return Address;\r
 }\r

diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
index 5910db09d6eab6dedbf521c7dff8242515fb842a..d5199729423c071ce057b8b694dd6f4b53d0a24d 100644 (file)
--- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+++ b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
@@ -31,6 +31,3 @@
 [LibraryClasses]\r
   ArmLib\r
   BaseLib\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
index e5247848b54990a0f1f5c2babdfe8b7dc691882f..dd585dea91fb7cebceb41138798072c3386fb26f 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf
@@ -41,6 +41,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
index 3a99e1b713cc341125c433e93c07953266a67cbb..23fbe8673198dad816619815402b33de255745dc 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf
@@ -43,6 +43,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf b/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
index 57ac694cd733209caa87c71281f23f725c9afdf3..302c09af49ddb0d36f273b94e1a4374a9981b83e 100644 (file)
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf
@@ -38,6 +38,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf
index 32d9299629a78b9b72d98dc093c0d92de311f3c6..6ac74d985c780bbe48b95f006bc6976e15c46b0b 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11Lib.inf
@@ -47,5 +47,4 @@
   gArmTokenSpaceGuid.PcdRelocateVectorTable\r
 \r
 [FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress\r

diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf
index 94dd03d82c5a53f6d280587aac8de3c27dc7e993..239493d3e60d01b40286a47b72fb4c0feda9d30e 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11LibPrePi.inf
@@ -47,5 +47,4 @@
   gArmTokenSpaceGuid.PcdRelocateVectorTable\r
 \r
 [FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress\r

diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf b/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf
index 69763ed4ff3a7ca5c5950bbe01129b11dbd340ee..ef3c8f8f72a48a4ae941872cc5c961bd8f274e51 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11LibSec.inf
@@ -43,5 +43,4 @@
   gArmTokenSpaceGuid.PcdRelocateVectorTable\r
 \r
 [FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r
   gArmTokenSpaceGuid.PcdCpuVectorBaseAddress\r

diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
index 81661b2391d53f8938c9f067c501f484ac33a357..e8aa056fbfea0cc849aa18cc77c0a4de58891f08 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLib.inf
@@ -41,6 +41,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
index 0730487cfb9e1c8619986d19c3018934d46bbf88..556e3dc5ab2a4fdf50a0173e799a0beff07ce2b0 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9ArmLibPrePi.inf
@@ -41,6 +41,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
index 55c0ec661a81c030fa3a81d3d599a37b62028fd5..01bdfb6996569fdd1189b1c9513358f38fc534f4 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
@@ -48,6 +48,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
index bc403d5613ca111a2a8a3c169ff1841a773f7d15..ac081068db286a0849f135ba415945144a36d709 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
@@ -48,6 +48,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
index 4081d1a3e563cf1ec6a542d0ec736296ec76aff9..a958764f564873438eeb4499fbc2ab150bcfbf89 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf
@@ -42,6 +42,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r

diff --git a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
index 21c374f0b293b743c48a44d4b89a8f79a3541237..36860a7bf949e90ab6c622212e48fab932bbfef3 100644 (file)
--- a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
+++ b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf
@@ -40,6 +40,3 @@
 \r
 [Protocols]\r
   gEfiCpuArchProtocolGuid\r
-\r
-[FixedPcd]\r
-  gArmTokenSpaceGuid.PcdArmCacheOperationThreshold\r