ArmPkg: Made ArmConfigureMmu() returns a status code

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.c b/ArmPkg/Drivers/CpuPei/CpuPei.c
index f358cb845a6660ca66e49325a290a4d08a6904c1..e984f5f1bf020040acd50aaca835b58fa9595102 100755 (executable)
--- a/ArmPkg/Drivers/CpuPei/CpuPei.c
+++ b/ArmPkg/Drivers/CpuPei/CpuPei.c
@@ -2,7 +2,7 @@
 \r
 Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>\r
 \r
 Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>\r

-Copyright (c) 2011, ARM Limited. All rights reserved.<BR>\r
+Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>\r

 \r
 This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 \r
 This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r


@@ -137,7 +137,10 @@ ConfigureMmu (
     SystemMemoryBase, SystemMemoryLength/1024/1024,\r
     (CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));\r
 \r
     SystemMemoryBase, SystemMemoryLength/1024/1024,\r
     (CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));\r
 \r

-  ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+  Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+  if (EFI_ERROR (Status)) {\r
+    DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU (error code: %r)\n", Status));\r
+  }\r

   \r
   BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
 }\r
   \r
   BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
 }\r

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 5663844b1f1890a6fdb91231f4cec7bb0cd2c732..8174845c6f2ddec060412713e6777b895d40b0b6 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -382,11 +382,11 @@ ArmGetTTBR0BaseAddress (
   VOID\r
   );\r
 \r
   VOID\r
   );\r
 \r

-VOID\r
+RETURN_STATUS\r

 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r
 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r

-  OUT VOID                          **TranslationTableBase OPTIONAL,\r
+  OUT VOID                         **TranslationTableBase OPTIONAL,\r

   OUT UINTN                         *TranslationTableSize  OPTIONAL\r
   );\r
   \r
   OUT UINTN                         *TranslationTableSize  OPTIONAL\r
   );\r
   \r

diff --git a/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c b/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c
index c683861cbb10f5b6aeb39c0f168edd66cefab1b5..6b94c418629a18db4f857be7db77438025204221 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c
+++ b/ArmPkg/Library/ArmLib/Arm11/Arm11LibMem.c
@@ -1,6 +1,7 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r

+  Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.\r

   \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r


@@ -63,18 +64,21 @@ FillTranslationTable (
   }\r
 }\r
 \r
   }\r
 }\r
 \r

-VOID\r
+RETURN_STATUS\r

 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r
 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r

-  OUT VOID                          **TranslationTableBase OPTIONAL,\r
-  OUT UINTN                         *TranslationTableSize  OPTIONAL\r
+  OUT VOID                         **TranslationTableBase OPTIONAL,\r
+  OUT UINTN                         *TranslationTableSize OPTIONAL\r

   )\r
 {\r
   VOID  *TranslationTable;\r
 \r
   // Allocate pages for translation table.\r
   )\r
 {\r
   VOID  *TranslationTable;\r
 \r
   // Allocate pages for translation table.\r

-  TranslationTable = AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));\r
+  TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));\r
+  if (TranslationTable == NULL) {\r
+    return RETURN_OUT_OF_RESOURCES;\r
+  }\r

   TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);\r
 \r
   if (TranslationTableBase != NULL) {\r
   TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);\r
 \r
   if (TranslationTableBase != NULL) {\r


@@ -125,9 +129,7 @@ ArmConfigureMmu (
     \r
   ArmEnableInstructionCache();\r
   ArmEnableDataCache();\r
     \r
   ArmEnableInstructionCache();\r
   ArmEnableDataCache();\r

-  ArmEnableMmu();  \r
-}\r
-\r
-\r
-\r
+  ArmEnableMmu();\r

 \r
 \r

+  return RETURN_SUCCESS;\r
+}\r

diff --git a/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c b/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c
index c92f9159c66d42cd3a3f89c3b755fa87ce6a4ae3..1acb158019254ff608c84bc0071520f5237e79d7 100644 (file)
--- a/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c
+++ b/ArmPkg/Library/ArmLib/Arm9/Arm9Lib.c
@@ -1,6 +1,7 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r

+  Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.\r

   \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r


@@ -62,18 +63,21 @@ FillTranslationTable (
   }\r
 }\r
 \r
   }\r
 }\r
 \r

-VOID\r
+RETURN_STATUS\r

 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r
 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r

-  OUT VOID                          **TranslationTableBase OPTIONAL,\r
-  OUT UINTN                         *TranslationTableSize  OPTIONAL\r
+  OUT VOID                         **TranslationTableBase OPTIONAL,\r
+  OUT UINTN                         *TranslationTableSize OPTIONAL\r

   )\r
 {\r
   VOID  *TranslationTable;\r
 \r
   // Allocate pages for translation table.\r
   )\r
 {\r
   VOID  *TranslationTable;\r
 \r
   // Allocate pages for translation table.\r

-  TranslationTable = AllocatePages(EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));\r
+  TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SIZE + TRANSLATION_TABLE_ALIGNMENT));\r
+  if (TranslationTable == NULL) {\r
+    return RETURN_OUT_OF_RESOURCES;\r
+  }\r

   TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);\r
 \r
   if (TranslationTableBase != NULL) {\r
   TranslationTable = (VOID *)(((UINTN)TranslationTable + TRANSLATION_TABLE_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_ALIGNMENT_MASK);\r
 \r
   if (TranslationTableBase != NULL) {\r


@@ -125,7 +129,6 @@ ArmConfigureMmu (
   ArmEnableInstructionCache();\r
   ArmEnableDataCache();\r
   ArmEnableMmu();\r
   ArmEnableInstructionCache();\r
   ArmEnableDataCache();\r
   ArmEnableMmu();\r

-}\r
-\r
-\r

 \r
 \r

+  return RETURN_SUCCESS;\r
+}\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index 7881a9b9fae2215473a95c94e5e8415f20ad787c..61183f1f18835923de6cfbcae68c6b117f0fca71 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -1,7 +1,7 @@
 /** @file\r
 *  File managing the MMU for ARMv7 architecture\r
 *\r
 /** @file\r
 *  File managing the MMU for ARMv7 architecture\r
 *\r

-*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r

 *  \r
 *  This program and the accompanying materials                          \r
 *  are licensed and made available under the terms and conditions of the BSD License         \r
 *  \r
 *  This program and the accompanying materials                          \r
 *  are licensed and made available under the terms and conditions of the BSD License         \r


@@ -194,31 +194,34 @@ FillTranslationTable (
   }\r
 }\r
 \r
   }\r
 }\r
 \r

-VOID\r
+RETURN_STATUS\r

 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r
 EFIAPI\r
 ArmConfigureMmu (\r
   IN  ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable,\r

-  OUT VOID                          **TranslationTableBase OPTIONAL,\r
-  OUT UINTN                         *TranslationTableSize  OPTIONAL\r
+  OUT VOID                         **TranslationTableBase OPTIONAL,\r
+  OUT UINTN                         *TranslationTableSize OPTIONAL\r

   )\r
 {\r
   )\r
 {\r

-  UINTN                         TranslationTable;\r
+  VOID*                         TranslationTable;\r

   ARM_MEMORY_REGION_ATTRIBUTES  TranslationTableAttribute;\r
   UINT32                        TTBRAttributes;\r
 \r
   // Allocate pages for translation table.\r
   ARM_MEMORY_REGION_ATTRIBUTES  TranslationTableAttribute;\r
   UINT32                        TTBRAttributes;\r
 \r
   // Allocate pages for translation table.\r

-  TranslationTable = (UINTN)AllocatePages (EFI_SIZE_TO_PAGES(TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));\r
-  TranslationTable = ((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK;\r
+  TranslationTable = AllocatePages (EFI_SIZE_TO_PAGES (TRANSLATION_TABLE_SECTION_SIZE + TRANSLATION_TABLE_SECTION_ALIGNMENT));\r
+  if (TranslationTable == NULL) {\r
+    return RETURN_OUT_OF_RESOURCES;\r
+  }\r
+  TranslationTable = (VOID*)(((UINTN)TranslationTable + TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK);\r

 \r
   if (TranslationTableBase != NULL) {\r
 \r
   if (TranslationTableBase != NULL) {\r

-    *TranslationTableBase = (VOID *)TranslationTable;\r
+    *TranslationTableBase = TranslationTable;\r

   }\r
   \r
   if (TranslationTableSize != NULL) {\r
     *TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;\r
   }\r
 \r
   }\r
   \r
   if (TranslationTableSize != NULL) {\r
     *TranslationTableSize = TRANSLATION_TABLE_SECTION_SIZE;\r
   }\r
 \r

-  ZeroMem ((VOID *)TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);\r
+  ZeroMem (TranslationTable, TRANSLATION_TABLE_SECTION_SIZE);\r

 \r
   ArmCleanInvalidateDataCache ();\r
   ArmInvalidateInstructionCache ();\r
 \r
   ArmCleanInvalidateDataCache ();\r
   ArmInvalidateInstructionCache ();\r


@@ -232,14 +235,15 @@ ArmConfigureMmu (
   ArmCleanInvalidateDataCache ();\r
   ArmInvalidateInstructionCache ();\r
 \r
   ArmCleanInvalidateDataCache ();\r
   ArmInvalidateInstructionCache ();\r
 \r

-  TranslationTableAttribute = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
+  // By default, mark the translation table as belonging to a uncached region\r
+  TranslationTableAttribute = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED;\r

   while (MemoryTable->Length != 0) {\r
     // Find the memory attribute for the Translation Table\r
   while (MemoryTable->Length != 0) {\r
     // Find the memory attribute for the Translation Table\r

-    if ((TranslationTable >= MemoryTable->PhysicalBase) && (TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) {\r
+    if (((UINTN)TranslationTable >= MemoryTable->PhysicalBase) && ((UINTN)TranslationTable <= MemoryTable->PhysicalBase - 1 + MemoryTable->Length)) {\r

       TranslationTableAttribute = MemoryTable->Attributes;\r
     }\r
 \r
       TranslationTableAttribute = MemoryTable->Attributes;\r
     }\r
 \r

-    FillTranslationTable ((VOID *)TranslationTable, MemoryTable);\r
+    FillTranslationTable (TranslationTable, MemoryTable);\r

     MemoryTable++;\r
   }\r
 \r
     MemoryTable++;\r
   }\r
 \r


@@ -254,11 +258,11 @@ ArmConfigureMmu (
       (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {\r
     TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC;\r
   } else {\r
       (TranslationTableAttribute == ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH)) {\r
     TTBRAttributes = TTBR_WRITE_THROUGH_NO_ALLOC;\r
   } else {\r

-    //TODO: We should raise an error here\r
-    TTBRAttributes = TTBR_NON_CACHEABLE;\r
+    ASSERT (0); // No support has been found for the attributes of the memory region that the translation table belongs to.\r
+    return RETURN_UNSUPPORTED;\r

   }\r
 \r
   }\r
 \r

-  ArmSetTTBR0 ((VOID *)(UINTN)((TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r
+  ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r

     \r
   ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r
                              DOMAIN_ACCESS_CONTROL_NONE(14) |\r
     \r
   ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r
                              DOMAIN_ACCESS_CONTROL_NONE(14) |\r


@@ -280,4 +284,5 @@ ArmConfigureMmu (
   ArmEnableInstructionCache();\r
   ArmEnableDataCache();\r
   ArmEnableMmu();\r
   ArmEnableInstructionCache();\r
   ArmEnableDataCache();\r
   ArmEnableMmu();\r

+  return RETURN_SUCCESS;\r

 }\r
 }\r

diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
index fa24c45ea8e3ff8b7f2ffaa18454e051b9f3d9a2..192486ce566a55decaf4c4d456d262c2f1e2cc60 100755 (executable)
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
@@ -33,13 +33,17 @@ InitMmu (
   ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable;\r
   VOID                          *TranslationTableBase;\r
   UINTN                         TranslationTableSize;\r
   ARM_MEMORY_REGION_DESCRIPTOR  *MemoryTable;\r
   VOID                          *TranslationTableBase;\r
   UINTN                         TranslationTableSize;\r

+  RETURN_STATUS                 Status;\r

 \r
   // Get Virtual Memory Map from the Platform Library\r
   ArmPlatformGetVirtualMemoryMap (&MemoryTable);\r
 \r
   //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in\r
   //      DRAM (even at the top of DRAM as it is the first permanent memory allocation)\r
 \r
   // Get Virtual Memory Map from the Platform Library\r
   ArmPlatformGetVirtualMemoryMap (&MemoryTable);\r
 \r
   //Note: Because we called PeiServicesInstallPeiMemory() before to call InitMmu() the MMU Page Table resides in\r
   //      DRAM (even at the top of DRAM as it is the first permanent memory allocation)\r

-  ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+  Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+  if (EFI_ERROR (Status)) {\r
+    DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU\n"));\r
+  }\r

 }\r
 \r
 /*++\r
 }\r
 \r
 /*++\r