+ { // DmarHeader\r
+ { // Header\r
+ EFI_ACPI_4_0_DMA_REMAPPING_TABLE_SIGNATURE,\r
+ sizeof(MY_VTD_INFO_PPI),\r
+ EFI_ACPI_DMAR_REVISION,\r
+ },\r
+ 0x26, // HostAddressWidth\r
+ },\r
+\r
+ { // Drhd1\r
+ { // Header\r
+ EFI_ACPI_DMAR_TYPE_DRHD,\r
+ sizeof(EFI_ACPI_DMAR_DRHD_HEADER) +\r
+ sizeof(EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER) +\r
+ sizeof(EFI_ACPI_DMAR_PCI_PATH)\r
+ },\r
+ 0, // Flags\r
+ 0, // Reserved\r
+ 0, // SegmentNumber\r
+ 0xFED90000 // RegisterBaseAddress -- TO BE PATCHED\r
+ },\r
+ { // Drhd11\r
+ EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT,\r
+ sizeof(EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER) +\r
+ sizeof(EFI_ACPI_DMAR_PCI_PATH),\r
+ 0, // Reserved2\r
+ 0, // EnumerationId\r
+ 0 // StartBusNumber\r
+ },\r
+ { // Drhd111\r
+ 2, // Device\r
+ 0 // Function\r
+ },\r
+\r
+ { // Drhd2\r
+ { // Header\r
+ EFI_ACPI_DMAR_TYPE_DRHD,\r
+ sizeof(EFI_ACPI_DMAR_DRHD_HEADER)\r
+ },\r
+ EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL, // Flags\r
+ 0, // Reserved\r
+ 0, // SegmentNumber\r
+ 0xFED91000 // RegisterBaseAddress -- TO BE PATCHED\r
+ },\r
+\r
+ { // Rmrr1\r
+ { // Header\r
+ EFI_ACPI_DMAR_TYPE_RMRR,\r
+ sizeof(EFI_ACPI_DMAR_RMRR_HEADER) +\r
+ sizeof(EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER) +\r
+ sizeof(EFI_ACPI_DMAR_PCI_PATH)\r
+ },\r
+ {0}, // Reserved\r
+ 0, // SegmentNumber\r
+ 0x0, // ReservedMemoryRegionBaseAddress -- TO BE PATCHED\r
+ 0x0 // ReservedMemoryRegionLimitAddress -- TO BE PATCHED\r
+ },\r
+ { // Rmrr11\r
+ EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT,\r
+ sizeof(EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER) +\r
+ sizeof(EFI_ACPI_DMAR_PCI_PATH),\r
+ 0, // Reserved2\r
+ 0, // EnumerationId\r
+ 0 // StartBusNumber\r
+ },\r
+ { // Rmrr111\r
+ 2, // Device\r
+ 0 // Function\r
+ },\r