\r
**/\r
\r
-#ifndef _PEI_SERIAL_PORT_PPI_H\r
-#define _PEI_SERIAL_PORT_PPI_H\r
+#ifndef __PEI_SERIAL_PORT_PPI_H__\r
+#define __PEI_SERIAL_PORT_PPI_H__\r
\r
#define PEI_SERIAL_PORT_PPI \\r
{ \\r
parameter Offset is added to the base address of the 16550 registers that is specified \r
by PcdSerialRegisterBase. \r
\r
+ @param Base The base address register of UART device.\r
@param Offset The offset of the 16550 register to read.\r
\r
@return The value read from the 16550 register.\r
parameter Offset is added to the base address of the 16550 registers that is specified \r
by PcdSerialRegisterBase. \r
\r
+ @param Base The base address register of UART device.\r
@param Offset The offset of the 16550 register to write.\r
@param Value The value to write to the 16550 register specified by Offset.\r
\r
This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART \r
Device if they are not already enabled. \r
\r
- @return The base address register of the PCI UART device.\r
+ @return The base address register of the UART device.\r
\r
**/\r
UINTN\r
/**\r
Return whether the hardware flow control signal allows writing.\r
\r
+ @param SerialRegisterBase The base address register of UART device.\r
+\r
@retval TRUE The serial port is writable.\r
@retval FALSE The serial port is not writable.\r
**/\r