ArmPkg/CpuDxe: set DmaBufferAlignment according to CWG

The DmaBufferAlignment currently defaults to 4, which is dangerously
small and may result in lost data on platforms that perform non-coherent
DMA. So instead, take the CWG value from the cache info registers.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c
index d089cb2d119fb972a9e186aec18971323f7c3ee4..7d328d096b1e498567d3b9e59775a39f645d933a 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuDxe.c
@@ -225,9 +225,18 @@ EFI_CPU_ARCH_PROTOCOL mCpu = {
   CpuGetTimerValue,\r
   CpuSetMemoryAttributes,\r
   0,          // NumberOfTimers\r
-  4,          // DmaBufferAlignment\r
+  2048,       // DmaBufferAlignment\r
 };\r
 \r
+STATIC\r
+VOID\r
+InitializeDma (\r
+  IN OUT  EFI_CPU_ARCH_PROTOCOL   *CpuArchProtocol\r
+  )\r
+{\r
+  CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule ();\r
+}\r
+\r
 EFI_STATUS\r
 CpuDxeInitialize (\r
   IN EFI_HANDLE         ImageHandle,\r
@@ -239,6 +248,8 @@ CpuDxeInitialize (
 \r
   InitializeExceptions (&mCpu);\r
 \r
+  InitializeDma (&mCpu);\r
+\r
   Status = gBS->InstallMultipleProtocolInterfaces (\r
                 &mCpuHandle,\r
                 &gEfiCpuArchProtocolGuid,           &mCpu,\r