#define B_UART_LSR_TEMT BIT6\r
#define R_UART_MSR 6\r
#define B_UART_MSR_CTS BIT4\r
+#define B_UART_MSR_DSR BIT5\r
\r
/**\r
Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from \r
//\r
for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, NumberOfBytes--, Buffer++) {\r
if (PcdGetBool (PcdSerialUseHardwareFlowControl)) {\r
- //\r
- // Wait for notification from peer to send data\r
- //\r
- while ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_CTS)) == 0);\r
+ if (PcdGetBool (PcdSerialDetectCable)) {\r
+ //\r
+ // Wait for both DSR and CTS to be set\r
+ // DSR is set if a cable is connected.\r
+ // CTS is set if it is ok to transmit data\r
+ //\r
+ // DSR CTS Description Action\r
+ // === === ======================================== ========\r
+ // 0 0 No cable connected. Wait\r
+ // 0 1 No cable connected. Wait\r
+ // 1 0 Cable connected, but not clear to send. Wait\r
+ // 1 1 Cable connected, and clear to send. Transmit\r
+ //\r
+ while ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR | B_UART_MSR_CTS));\r
+ } else {\r
+ //\r
+ // Wait for both DSR and CTS to be set OR for DSR to be clear. \r
+ // DSR is set if a cable is connected.\r
+ // CTS is set if it is ok to transmit data\r
+ //\r
+ // DSR CTS Description Action\r
+ // === === ======================================== ========\r
+ // 0 0 No cable connected. Transmit\r
+ // 0 1 No cable connected. Transmit\r
+ // 1 0 Cable connected, but not clear to send. Wait\r
+ // 1 1 Cable connected, and clar to send. Transmit\r
+ //\r
+ while ((SerialPortReadRegister (R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR));\r
+ }\r
}\r
\r
//\r
## @file\r
# SerialPortLib instance for 16550 UART\r
#\r
-# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
[Pcd]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl\r
# It also provides the defintions(including PPIs/PROTOCOLs/GUIDs and library classes)\r
# and libraries instances, which are used for those modules.\r
#\r
-# Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2011, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials are licensed and made available under \r
# the terms and conditions of the BSD License that accompanies this distribution. \r
# The full text of the license may be found at\r
# If FALSE, then the 16550 serial port hardware flow control is disabled. Default value.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE|BOOLEAN|0x00020001\r
\r
+ ## If TRUE, then 16550 serial Tx operations will block if DSR is not asserted (no cable).\r
+ # If FALSE, then the 16550 serial Tx operations will not be blocked if DSR is not asserted. Default value.\r
+ # This PCD is ignored if PcdSerialUseHardwareFlowControl is FALSE.\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable|FALSE|BOOLEAN|0x00020006\r
+ \r
## Base address of 16550 serial port registers in MMIO or I/O space. Default is 0x3F8.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x03F8|UINT64|0x00020002\r
\r