UefiCpuPkg/Universal/Acpi/S3Resume2Pei: Add support for PCD PcdPteMemoryEncryptionAdd...
authorLeo Duran <leo.duran@amd.com>
Sun, 26 Feb 2017 17:43:05 +0000 (01:43 +0800)
committerStar Zeng <star.zeng@intel.com>
Wed, 1 Mar 2017 04:52:41 +0000 (12:52 +0800)
This PCD holds the address mask for page table entries when memory
encryption is enabled on AMD processors supporting the Secure Encrypted
Virtualization (SEV) feature.

The mask is applied when page tables are created (S3Resume.c).

CC: Jeff Fan <jeff.fan@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leo Duran <leo.duran@amd.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf

index d306fba56101d740be7b2250c95b13c9f4ae4e83..a9d104233008dc8cc15c6f02fded9d611ebae4dc 100644 (file)
@@ -5,6 +5,7 @@
   control is passed to OS waking up handler.\r
 \r
   Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions\r
@@ -58,6 +59,8 @@
 #define STACK_ALIGN_DOWN(Ptr) \\r
           ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))\r
 \r
+#define PAGING_1G_ADDRESS_MASK_64  0x000FFFFFC0000000ull\r
+\r
 #pragma pack(1)\r
 typedef union {\r
   struct {\r
@@ -614,6 +617,12 @@ RestoreS3PageTables (
     VOID                                          *Hob;\r
     BOOLEAN                                       Page1GSupport;\r
     PAGE_TABLE_1G_ENTRY                           *PageDirectory1GEntry;\r
+    UINT64                                        AddressEncMask;\r
+\r
+    //\r
+    // Make sure AddressEncMask is contained to smallest supported address field\r
+    //\r
+    AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;\r
 \r
     //\r
     // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.\r
@@ -696,7 +705,7 @@ RestoreS3PageTables (
       //\r
       // Make a PML4 Entry\r
       //\r
-      PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;\r
+      PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r
       PageMapLevel4Entry->Bits.ReadWrite = 1;\r
       PageMapLevel4Entry->Bits.Present = 1;\r
 \r
@@ -707,7 +716,7 @@ RestoreS3PageTables (
           //\r
           // Fill in the Page Directory entries\r
           //\r
-          PageDirectory1GEntry->Uint64 = (UINT64)PageAddress;\r
+          PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
           PageDirectory1GEntry->Bits.ReadWrite = 1;\r
           PageDirectory1GEntry->Bits.Present = 1;\r
           PageDirectory1GEntry->Bits.MustBe1 = 1;\r
@@ -724,7 +733,7 @@ RestoreS3PageTables (
           //\r
           // Fill in a Page Directory Pointer Entries\r
           //\r
-          PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;\r
+          PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r
           PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r
           PageDirectoryPointerEntry->Bits.Present = 1;\r
     \r
@@ -732,7 +741,7 @@ RestoreS3PageTables (
             //\r
             // Fill in the Page Directory entries\r
             //\r
-            PageDirectoryEntry->Uint64 = (UINT64)PageAddress;\r
+            PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r
             PageDirectoryEntry->Bits.ReadWrite = 1;\r
             PageDirectoryEntry->Bits.Present = 1;\r
             PageDirectoryEntry->Bits.MustBe1 = 1;\r
index 73aeca3c2e53ae08c1c8e60c945f08e79a4a91f8..d514523089711dd1d58c335bf4757a5229c8d370 100644 (file)
@@ -6,6 +6,7 @@
 # control is passed to OS waking up handler.\r
 #\r
 # Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 #\r
 # This program and the accompanying materials are\r
 # licensed and made available under the terms and conditions of the BSD License\r
@@ -91,6 +92,7 @@
 \r
 [Pcd]\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable  ## SOMETIMES_CONSUMES\r
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask    ## CONSUMES\r
 \r
 [Depex]\r
   TRUE\r