On X64, the reset vector code in
"OvmfPkg/ResetVector/Ia32/PageTables64.asm" identity maps the first 4GB of
RAM for PEI, consuming six frames starting at 8MB.
This range is declared by the PcdOvmfSecPageTablesBase/Size PCDs.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
[jordan.l.justen@intel.com: Move to MemDetect.c; use PCDs]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15298
6f19259b-4bc3-4df7-8a09-
765794883524
PcdGet32 (PcdOvmfSecPeiTempRamSize),\r
EfiACPIMemoryNVS\r
);\r
+\r
+#ifdef MDE_CPU_X64\r
+ //\r
+ // Reserve the initial page tables built by the reset vector code.\r
+ //\r
+ // Since this memory range will be used by the Reset Vector on S3\r
+ // resume, it must be reserved as ACPI NVS.\r
+ //\r
+ BuildMemoryAllocationHob (\r
+ (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet32 (PcdOvmfSecPageTablesBase),\r
+ (UINT64)(UINTN) PcdGet32 (PcdOvmfSecPageTablesSize),\r
+ EfiACPIMemoryNVS\r
+ );\r
+#endif\r
}\r
}\r
gUefiOvmfPkgTokenSpaceGuid.PcdS3AcpiReservedMemoryBase\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase\r
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize\r
gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize\r
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r