+/** @file SysCfgArmVExpress.c\r
+\r
+ Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiDxe.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#include <Library/ArmPlatformSysConfigLib.h>\r
+#include <ArmPlatform.h>\r
+\r
+//\r
+// SYS_CFGCTRL Bits\r
+//\r
+#define SYS_CFGCTRL_START BIT31\r
+#define SYS_CFGCTRL_READ (0 << 30)\r
+#define SYS_CFGCTRL_WRITE (1 << 30)\r
+#define SYS_CFGCTRL_FUNCTION(fun) (((fun ) & 0x3F) << 20)\r
+#define SYS_CFGCTRL_SITE(site) (((site) & 0x3) << 16)\r
+#define SYS_CFGCTRL_POSITION(pos) (((pos ) & 0xF) << 12)\r
+#define SYS_CFGCTRL_DEVICE(dev) ((dev ) & 0xFFF)\r
+\r
+//\r
+// SYS_CFGSTAT Bits\r
+//\r
+#define SYS_CFGSTAT_ERROR BIT1\r
+#define SYS_CFGSTAT_COMPLETE BIT0\r
+\r
+/****************************************************************************\r
+ *\r
+ * This file makes it easier to access the System Configuration Registers\r
+ * in the ARM Versatile Express motherboard.\r
+ *\r
+ ****************************************************************************/\r
+\r
+EFI_STATUS\r
+ArmPlatformSysConfigInitialize (\r
+ VOID\r
+ )\r
+{\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/***************************************\r
+ * GENERAL FUNCTION: AccessSysCfgRegister\r
+ * Interacts with\r
+ * SYS_CFGSTAT\r
+ * SYS_CFGDATA\r
+ * SYS_CFGCTRL\r
+ * for setting and for reading out values\r
+ ***************************************/\r
+\r
+EFI_STATUS\r
+AccessSysCfgRegister (\r
+ IN UINT32 ReadWrite,\r
+ IN UINT32 Function,\r
+ IN UINT32 Site,\r
+ IN UINT32 Position,\r
+ IN UINT32 Device,\r
+ IN OUT UINT32* Data\r
+ )\r
+{\r
+ UINT32 SysCfgCtrl;\r
+\r
+ // Clear the COMPLETE bit\r
+ MmioAnd32(ARM_VE_SYS_CFGSTAT_REG, ~SYS_CFGSTAT_COMPLETE);\r
+\r
+ // If writing, then set the data value\r
+ if(ReadWrite == SYS_CFGCTRL_WRITE) {\r
+ MmioWrite32(ARM_VE_SYS_CFGDATA_REG, *Data);\r
+ }\r
+\r
+ // Set the control value\r
+ SysCfgCtrl = SYS_CFGCTRL_START | ReadWrite | SYS_CFGCTRL_FUNCTION(Function) | SYS_CFGCTRL_SITE(Site) |\r
+ SYS_CFGCTRL_POSITION(Position) | SYS_CFGCTRL_DEVICE(Device);\r
+ MmioWrite32(ARM_VE_SYS_CFGCTRL_REG, SysCfgCtrl);\r
+\r
+ // Wait until the COMPLETE bit is set\r
+ while ((MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_COMPLETE) == 0);\r
+\r
+ // Check for errors\r
+ if(MmioRead32(ARM_VE_SYS_CFGSTAT_REG) & SYS_CFGSTAT_ERROR) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ // If reading then get the data value\r
+ if(ReadWrite == SYS_CFGCTRL_READ) {\r
+ *Data = MmioRead32(ARM_VE_SYS_CFGDATA_REG);\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+EFI_STATUS\r
+ArmPlatformSysConfigGet (\r
+ IN SYS_CONFIG_FUNCTION Function,\r
+ OUT UINT32* Value\r
+ )\r
+{\r
+ UINT32 Site;\r
+ UINT32 Position;\r
+ UINT32 Device;\r
+\r
+ Position = 0;\r
+ Device = 0;\r
+\r
+ // Intercept some functions\r
+ switch(Function) {\r
+\r
+ case SYS_CFG_OSC_SITE1:\r
+ Function = SYS_CFG_OSC;\r
+ Site = ARM_VE_DAUGHTERBOARD_1_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_OSC_SITE2:\r
+ Function = SYS_CFG_OSC;\r
+ Site = ARM_VE_DAUGHTERBOARD_2_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_MUXFPGA:\r
+ Site = *Value;\r
+ break;\r
+\r
+ case SYS_CFG_OSC:\r
+ case SYS_CFG_VOLT:\r
+ case SYS_CFG_AMP:\r
+ case SYS_CFG_TEMP:\r
+ case SYS_CFG_RESET:\r
+ case SYS_CFG_SCC:\r
+ case SYS_CFG_DVIMODE:\r
+ case SYS_CFG_POWER:\r
+ Site = ARM_VE_MOTHERBOARD_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_SHUTDOWN:\r
+ case SYS_CFG_REBOOT:\r
+ case SYS_CFG_RTC:\r
+ default:\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ return AccessSysCfgRegister (SYS_CFGCTRL_READ, Function, Site, Position, Device, Value);\r
+}\r
+\r
+EFI_STATUS\r
+ArmPlatformSysConfigSet (\r
+ IN SYS_CONFIG_FUNCTION Function,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ UINT32 Site;\r
+ UINT32 Position;\r
+ UINT32 Device;\r
+\r
+ Position = 0;\r
+ Device = 0;\r
+\r
+ // Intercept some functions\r
+ switch(Function) {\r
+\r
+ case SYS_CFG_OSC_SITE1:\r
+ Function = SYS_CFG_OSC;\r
+ Site = ARM_VE_DAUGHTERBOARD_1_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_OSC_SITE2:\r
+ Function = SYS_CFG_OSC;\r
+ Site = ARM_VE_DAUGHTERBOARD_2_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_MUXFPGA:\r
+ Site = Value;\r
+ break;\r
+\r
+ case SYS_CFG_RESET:\r
+ case SYS_CFG_SCC:\r
+ case SYS_CFG_SHUTDOWN:\r
+ case SYS_CFG_REBOOT:\r
+ case SYS_CFG_DVIMODE:\r
+ case SYS_CFG_POWER:\r
+ Site = ARM_VE_MOTHERBOARD_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_OSC:\r
+ case SYS_CFG_VOLT:\r
+ case SYS_CFG_AMP:\r
+ case SYS_CFG_TEMP:\r
+ case SYS_CFG_RTC:\r
+ default:\r
+ return(EFI_UNSUPPORTED);\r
+ }\r
+\r
+ return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);\r
+}\r
+\r
+EFI_STATUS\r
+ArmPlatformSysConfigSetDevice (\r
+ IN SYS_CONFIG_FUNCTION Function,\r
+ IN UINT32 Device,\r
+ IN UINT32 Value\r
+ )\r
+{\r
+ UINT32 Site;\r
+ UINT32 Position;\r
+\r
+ Position = 0;\r
+\r
+ // Intercept some functions\r
+ switch(Function) {\r
+\r
+ case SYS_CFG_OSC_SITE1:\r
+ Function = SYS_CFG_OSC;\r
+ Site = ARM_VE_DAUGHTERBOARD_1_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_OSC_SITE2:\r
+ Function = SYS_CFG_OSC;\r
+ Site = ARM_VE_DAUGHTERBOARD_2_SITE;\r
+ break;\r
+\r
+ case SYS_CFG_MUXFPGA:\r
+ Site = Value;\r
+ break;\r
+\r
+ case SYS_CFG_RTC:\r
+ return(EFI_UNSUPPORTED);\r
+ //break;\r
+\r
+ case SYS_CFG_OSC:\r
+ case SYS_CFG_VOLT:\r
+ case SYS_CFG_AMP:\r
+ case SYS_CFG_TEMP:\r
+ case SYS_CFG_RESET:\r
+ case SYS_CFG_SCC:\r
+ case SYS_CFG_SHUTDOWN:\r
+ case SYS_CFG_REBOOT:\r
+ case SYS_CFG_DVIMODE:\r
+ case SYS_CFG_POWER:\r
+ Site = ARM_VE_MOTHERBOARD_SITE;\r
+ break;\r
+ default:\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ return AccessSysCfgRegister (SYS_CFGCTRL_WRITE, Function, Site, Position, Device, &Value);\r
+}\r