}\r
}\r
\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
//\r
// Make sure there are adjacent descriptors covering [Base, Base + Length).\r
// It is possible that they have not been merged; merging can be prevented\r
ASSERT (Descriptor.GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo);\r
ASSERT ((Descriptor.Capabilities & Capabilities) == Capabilities);\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
\r
FreeMemorySpaceMap:\r
FreePool (MemorySpaceMap);\r
\r
return Status;\r
}\r
-\r
VOID\r
)\r
{\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
{\r
MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;\r
\r
ASSERT (ApicBaseMsr.Bits.EXTD == 0);\r
}\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
return LOCAL_APIC_MODE_XAPIC;\r
}\r
\r
//\r
// Dump the microcode revision for each core.\r
//\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
UINT32 ThreadId;\r
UINT32 ExpectedMicrocodeRevision;\r
CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
));\r
}\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
//\r
// Initialize global data for MP support\r
//\r
//\r
// 0. Dump the requests.\r
//\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
DEBUG ((DEBUG_CACHE, "Mtrr: Set Mem Attribute to %a, ScratchSize = %x%a",\r
(MtrrSetting == NULL) ? "Hardware" : "Buffer", *ScratchSize,\r
(RangeCount <= 1) ? "," : "\n"\r
Ranges[Index].BaseAddress, Ranges[Index].BaseAddress + Ranges[Index].Length\r
));\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
\r
//\r
// 1. Validate the parameters.\r
IN MTRR_SETTINGS *MtrrSetting\r
)\r
{\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
MTRR_SETTINGS LocalMtrrs;\r
MTRR_SETTINGS *Mtrrs;\r
UINTN Index;\r
Ranges[Index].BaseAddress, Ranges[Index].BaseAddress + Ranges[Index].Length - 1\r
));\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
}\r
\r
/**\r
//\r
// Dump the last CPU feature list\r
//\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
DEBUG ((DEBUG_INFO, "Last CPU features list...\n"));\r
Entry = GetFirstNode (&CpuFeaturesData->FeatureList);\r
while (!IsNull (&CpuFeaturesData->FeatureList, Entry)) {\r
DumpCpuFeatureMask (PcdGetPtr (PcdCpuFeaturesSetting), CpuFeaturesData->BitMaskSize);\r
DEBUG ((DEBUG_INFO, "Final PcdCpuFeaturesSetting:\n"));\r
DumpCpuFeatureMask (CpuFeaturesData->SettingPcd, CpuFeaturesData->BitMaskSize);\r
- );\r
+ DEBUG_CODE_END ();\r
\r
//\r
// Save PCDs and display CPU PCDs\r
\r
AnalysisProcessorFeatures (CpuFeaturesData->NumberOfCpus);\r
}\r
-\r
// If support CPU hot plug, PcdCpuSmmEnableBspElection should be set to TRUE.\r
// A constant BSP index makes no sense because it may be hot removed.\r
//\r
- DEBUG_CODE (\r
+ DEBUG_CODE_BEGIN ();\r
if (FeaturePcdGet (PcdCpuHotPlugSupport)) {\r
\r
ASSERT (FeaturePcdGet (PcdCpuSmmEnableBspElection));\r
}\r
- );\r
+ DEBUG_CODE_END ();\r
\r
//\r
// Save the PcdCpuSmmCodeAccessCheckEnable value into a global variable.\r