]> git.proxmox.com Git - mirror_edk2.git/commitdiff
UefiCpuPkg/MpInitLib: Fill MP_CPU_EXCHANGE_INFO fields
authorJeff Fan <jeff.fan@intel.com>
Wed, 20 Jul 2016 16:22:21 +0000 (00:22 +0800)
committerJeff Fan <jeff.fan@intel.com>
Wed, 17 Aug 2016 12:01:00 +0000 (20:01 +0800)
FillExchangeInfoData() is used to fill MP_CPU_EXCHANGE_INFO date exchanged
between C code and assembly code of AP reset vector.

v5:
  1. Reference ApWakeupFunction instead of ApCFunction.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Michael Kinney <michael.d.kinney@intel.com>
UefiCpuPkg/Library/MpInitLib/MpLib.c

index a4a2c440c08dd7d55ba687aee1d36ac9987c0e7e..d081111fbf034d15adb2b83861d0b99ea127bf22 100644 (file)
 \r
 EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;\r
 \r
+/**\r
+  The function will check if BSP Execute Disable is enabled.\r
+  DxeIpl may have enabled Execute Disable for BSP,\r
+  APs need to get the status and sync up the settings.\r
+\r
+  @retval TRUE      BSP Execute Disable is enabled.\r
+  @retval FALSE     BSP Execute Disable is not enabled.\r
+**/\r
+BOOLEAN\r
+IsBspExecuteDisableEnabled (\r
+  VOID\r
+  )\r
+{\r
+  UINT32                      Eax;\r
+  CPUID_EXTENDED_CPU_SIG_EDX  Edx;\r
+  MSR_IA32_EFER_REGISTER      EferMsr;\r
+  BOOLEAN                     Enabled;\r
+\r
+  Enabled = FALSE;\r
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &Eax, NULL, NULL, NULL);\r
+  if (Eax >= CPUID_EXTENDED_CPU_SIG) {\r
+    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &Edx.Uint32);\r
+    //\r
+    // CPUID 0x80000001\r
+    // Bit 20: Execute Disable Bit available.\r
+    //\r
+    if (Edx.Bits.NX != 0) {\r
+      EferMsr.Uint64 = AsmReadMsr64 (MSR_IA32_EFER);\r
+      //\r
+      // MSR 0xC0000080\r
+      // Bit 11: Execute Disable Bit enable.\r
+      //\r
+      if (EferMsr.Bits.NXE != 0) {\r
+        Enabled = TRUE;\r
+      }\r
+    }\r
+  }\r
+\r
+  return Enabled;\r
+}\r
+\r
 /**\r
   Get the Application Processors state.\r
 \r
@@ -406,6 +447,44 @@ ApWakeupFunction (
   }\r
 }\r
 \r
+/**\r
+  This function will fill the exchange info structure.\r
+\r
+  @param[in] CpuMpData          Pointer to CPU MP Data\r
+\r
+**/\r
+VOID\r
+FillExchangeInfoData (\r
+  IN CPU_MP_DATA               *CpuMpData\r
+  )\r
+{\r
+  volatile MP_CPU_EXCHANGE_INFO    *ExchangeInfo;\r
+\r
+  ExchangeInfo                  = CpuMpData->MpCpuExchangeInfo;\r
+  ExchangeInfo->Lock            = 0;\r
+  ExchangeInfo->StackStart      = CpuMpData->Buffer;\r
+  ExchangeInfo->StackSize       = CpuMpData->CpuApStackSize;\r
+  ExchangeInfo->BufferStart     = CpuMpData->WakeupBuffer;\r
+  ExchangeInfo->ModeOffset      = CpuMpData->AddressMap.ModeEntryOffset;\r
+\r
+  ExchangeInfo->CodeSegment     = AsmReadCs ();\r
+  ExchangeInfo->DataSegment     = AsmReadDs ();\r
+\r
+  ExchangeInfo->Cr3             = AsmReadCr3 ();\r
+\r
+  ExchangeInfo->CFunction       = (UINTN) ApWakeupFunction;\r
+  ExchangeInfo->NumApsExecuting = 0;\r
+  ExchangeInfo->CpuMpData       = CpuMpData;\r
+\r
+  ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();\r
+\r
+  //\r
+  // Get the BSP's data of GDT and IDT\r
+  //\r
+  AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);\r
+  AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
+}\r
+\r
 /**\r
   MP Initialize Library initialization.\r
 \r