\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_PLATFORM_ID);\r
@endcode\r
+ @note MSR_ATOM_PLATFORM_ID is defined as MSR_PLATFORM_ID in SDM.\r
**/\r
#define MSR_ATOM_PLATFORM_ID 0x00000017\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_EBL_CR_POWERON);\r
AsmWriteMsr64 (MSR_ATOM_EBL_CR_POWERON, Msr.Uint64);\r
@endcode\r
+ @note MSR_ATOM_EBL_CR_POWERON is defined as MSR_EBL_CR_POWERON in SDM.\r
**/\r
#define MSR_ATOM_EBL_CR_POWERON 0x0000002A\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_LASTBRANCH_0_FROM_IP);\r
AsmWriteMsr64 (MSR_ATOM_LASTBRANCH_0_FROM_IP, Msr);\r
@endcode\r
+ @note MSR_ATOM_LASTBRANCH_0_FROM_IP is defined as MSR_LASTBRANCH_0_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_1_FROM_IP is defined as MSR_LASTBRANCH_1_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_2_FROM_IP is defined as MSR_LASTBRANCH_2_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_3_FROM_IP is defined as MSR_LASTBRANCH_3_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_4_FROM_IP is defined as MSR_LASTBRANCH_4_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_5_FROM_IP is defined as MSR_LASTBRANCH_5_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_6_FROM_IP is defined as MSR_LASTBRANCH_6_FROM_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_7_FROM_IP is defined as MSR_LASTBRANCH_7_FROM_IP in SDM.\r
@{\r
**/\r
#define MSR_ATOM_LASTBRANCH_0_FROM_IP 0x00000040\r
Msr = AsmReadMsr64 (MSR_ATOM_LASTBRANCH_0_TO_IP);\r
AsmWriteMsr64 (MSR_ATOM_LASTBRANCH_0_TO_IP, Msr);\r
@endcode\r
+ @note MSR_ATOM_LASTBRANCH_0_TO_IP is defined as MSR_LASTBRANCH_0_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_1_TO_IP is defined as MSR_LASTBRANCH_1_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_2_TO_IP is defined as MSR_LASTBRANCH_2_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_3_TO_IP is defined as MSR_LASTBRANCH_3_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_4_TO_IP is defined as MSR_LASTBRANCH_4_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_5_TO_IP is defined as MSR_LASTBRANCH_5_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_6_TO_IP is defined as MSR_LASTBRANCH_6_TO_IP in SDM.\r
+ MSR_ATOM_LASTBRANCH_7_TO_IP is defined as MSR_LASTBRANCH_7_TO_IP in SDM.\r
@{\r
**/\r
#define MSR_ATOM_LASTBRANCH_0_TO_IP 0x00000060\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_FSB_FREQ);\r
@endcode\r
+ @note MSR_ATOM_FSB_FREQ is defined as MSR_FSB_FREQ in SDM.\r
**/\r
#define MSR_ATOM_FSB_FREQ 0x000000CD\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_BBL_CR_CTL3);\r
AsmWriteMsr64 (MSR_ATOM_BBL_CR_CTL3, Msr.Uint64);\r
@endcode\r
+ @note MSR_ATOM_BBL_CR_CTL3 is defined as MSR_BBL_CR_CTL3 in SDM.\r
**/\r
#define MSR_ATOM_BBL_CR_CTL3 0x0000011E\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_PERF_STATUS);\r
AsmWriteMsr64 (MSR_ATOM_PERF_STATUS, Msr.Uint64);\r
@endcode\r
+ @note MSR_ATOM_PERF_STATUS is defined as MSR_PERF_STATUS in SDM.\r
**/\r
#define MSR_ATOM_PERF_STATUS 0x00000198\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_THERM2_CTL);\r
AsmWriteMsr64 (MSR_ATOM_THERM2_CTL, Msr.Uint64);\r
@endcode\r
+ @note MSR_ATOM_THERM2_CTL is defined as MSR_THERM2_CTL in SDM.\r
**/\r
#define MSR_ATOM_THERM2_CTL 0x0000019D\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_IA32_MISC_ENABLE);\r
AsmWriteMsr64 (MSR_ATOM_IA32_MISC_ENABLE, Msr.Uint64);\r
@endcode\r
+ @note MSR_ATOM_IA32_MISC_ENABLE is defined as IA32_MISC_ENABLE in SDM.\r
**/\r
#define MSR_ATOM_IA32_MISC_ENABLE 0x000001A0\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_LASTBRANCH_TOS);\r
AsmWriteMsr64 (MSR_ATOM_LASTBRANCH_TOS, Msr);\r
@endcode\r
+ @note MSR_ATOM_LASTBRANCH_TOS is defined as MSR_LASTBRANCH_TOS in SDM.\r
**/\r
#define MSR_ATOM_LASTBRANCH_TOS 0x000001C9\r
\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_LER_FROM_LIP);\r
@endcode\r
+ @note MSR_ATOM_LER_FROM_LIP is defined as MSR_LER_FROM_LIP in SDM.\r
**/\r
#define MSR_ATOM_LER_FROM_LIP 0x000001DD\r
\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_LER_TO_LIP);\r
@endcode\r
+ @note MSR_ATOM_LER_TO_LIP is defined as MSR_LER_TO_LIP in SDM.\r
**/\r
#define MSR_ATOM_LER_TO_LIP 0x000001DE\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_IA32_PERF_GLOBAL_STAUS);\r
AsmWriteMsr64 (MSR_ATOM_IA32_PERF_GLOBAL_STAUS, Msr);\r
@endcode\r
+ @note MSR_ATOM_IA32_PERF_GLOBAL_STAUS is defined as IA32_PERF_GLOBAL_STAUS in SDM.\r
**/\r
#define MSR_ATOM_IA32_PERF_GLOBAL_STAUS 0x0000038E\r
\r
Msr.Uint64 = AsmReadMsr64 (MSR_ATOM_PEBS_ENABLE);\r
AsmWriteMsr64 (MSR_ATOM_PEBS_ENABLE, Msr.Uint64);\r
@endcode\r
+ @note MSR_ATOM_PEBS_ENABLE is defined as MSR_PEBS_ENABLE in SDM.\r
**/\r
#define MSR_ATOM_PEBS_ENABLE 0x000003F1\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_MC3_CTL);\r
AsmWriteMsr64 (MSR_ATOM_MC3_CTL, Msr);\r
@endcode\r
+ @note MSR_ATOM_MC3_CTL is defined as MSR_MC3_CTL in SDM.\r
**/\r
#define MSR_ATOM_MC3_CTL 0x0000040C\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_MC3_STATUS);\r
AsmWriteMsr64 (MSR_ATOM_MC3_STATUS, Msr);\r
@endcode\r
+ @note MSR_ATOM_MC3_STATUS is defined as MSR_MC3_STATUS in SDM.\r
**/\r
#define MSR_ATOM_MC3_STATUS 0x0000040D\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_MC3_ADDR);\r
AsmWriteMsr64 (MSR_ATOM_MC3_ADDR, Msr);\r
@endcode\r
+ @note MSR_ATOM_MC3_ADDR is defined as MSR_MC3_ADDR in SDM.\r
**/\r
#define MSR_ATOM_MC3_ADDR 0x0000040E\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_MC4_CTL);\r
AsmWriteMsr64 (MSR_ATOM_MC4_CTL, Msr);\r
@endcode\r
+ @note MSR_ATOM_MC4_CTL is defined as MSR_MC4_CTL in SDM.\r
**/\r
#define MSR_ATOM_MC4_CTL 0x00000410\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_MC4_STATUS);\r
AsmWriteMsr64 (MSR_ATOM_MC4_STATUS, Msr);\r
@endcode\r
+ @note MSR_ATOM_MC4_STATUS is defined as MSR_MC4_STATUS in SDM.\r
**/\r
#define MSR_ATOM_MC4_STATUS 0x00000411\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_MC4_ADDR);\r
AsmWriteMsr64 (MSR_ATOM_MC4_ADDR, Msr);\r
@endcode\r
+ @note MSR_ATOM_MC4_ADDR is defined as MSR_MC4_ADDR in SDM.\r
**/\r
#define MSR_ATOM_MC4_ADDR 0x00000412\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_PKG_C2_RESIDENCY);\r
AsmWriteMsr64 (MSR_ATOM_PKG_C2_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_ATOM_PKG_C2_RESIDENCY is defined as MSR_PKG_C2_RESIDENCY in SDM.\r
**/\r
#define MSR_ATOM_PKG_C2_RESIDENCY 0x000003F8\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_PKG_C4_RESIDENCY);\r
AsmWriteMsr64 (MSR_ATOM_PKG_C4_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_ATOM_PKG_C4_RESIDENCY is defined as MSR_PKG_C4_RESIDENCY in SDM.\r
**/\r
#define MSR_ATOM_PKG_C4_RESIDENCY 0x000003F9\r
\r
Msr = AsmReadMsr64 (MSR_ATOM_PKG_C6_RESIDENCY);\r
AsmWriteMsr64 (MSR_ATOM_PKG_C6_RESIDENCY, Msr);\r
@endcode\r
+ @note MSR_ATOM_PKG_C6_RESIDENCY is defined as MSR_PKG_C6_RESIDENCY in SDM.\r
**/\r
#define MSR_ATOM_PKG_C6_RESIDENCY 0x000003FA\r
\r