--- /dev/null
+//\r
+// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+// Copyright (c) 2015, Linaro Limited. All rights reserved.\r
+//\r
+// This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Base.h>\r
+#include <Library/PcdLib.h>\r
+#include <AutoGen.h>\r
+\r
+.text\r
+.align 3\r
+\r
+GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
+GCC_ASM_IMPORT(ArmReadMpidr)\r
+GCC_ASM_IMPORT(ArmPlatformPeiBootAction)\r
+GCC_ASM_IMPORT(ArmPlatformStackSet)\r
+GCC_ASM_EXPORT(_ModuleEntryPoint)\r
+ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)\r
+\r
+StartupAddr: .long ASM_PFX(CEntryPoint)\r
+ASM_PFX(mSystemMemoryEnd): .quad 0\r
+\r
+__relocs:\r
+ .long __reloc_base - __relocs\r
+ .long __reloc_start - __relocs\r
+ .long __reloc_end - __relocs\r
+\r
+ASM_PFX(_ModuleEntryPoint):\r
+ //\r
+ // We are built as a ET_DYN PIE executable, so we need to process all\r
+ // relative relocations if we are executing from a different offset than we\r
+ // were linked at. This is only possible if we are running from RAM.\r
+ //\r
+\r
+ adr r12, __relocs\r
+ ldrd r4, r5, [r12]\r
+ ldr r6, [r12, #8]\r
+\r
+ add r4, r4, r12\r
+ add r5, r5, r12\r
+ add r6, r6, r12\r
+\r
+.Lreloc_loop:\r
+ cmp r5, r6\r
+ bhs .Lreloc_done\r
+\r
+ //\r
+ // AArch32 uses the ELF32 REL format, which means each entry in the\r
+ // relocation table consists of\r
+ //\r
+ // UINT32 offset : the relative offset of the value that needs to\r
+ // be relocated\r
+ // UINT32 info : relocation type and symbol index (the latter is\r
+ // not used for R_ARM_RELATIVE relocations)\r
+ //\r
+ ldrd r8, r9, [r5], #8 // read offset into r8 and info into r9\r
+ cmp r9, #23 // check info == R_ARM_RELATIVE?\r
+ bne .Lreloc_loop // not a relative relocation? then skip\r
+\r
+ ldr r9, [r8, r4] // read addend into r9\r
+ add r9, r9, r1 // add image base to addend to get relocated value\r
+ str r9, [r8, r4] // write relocated value at offset\r
+ b .Lreloc_loop\r
+.Lreloc_done:\r
+\r
+ // Do early platform specific actions\r
+ bl ASM_PFX(ArmPlatformPeiBootAction)\r
+\r
+ // Get ID of this CPU in Multicore system\r
+ bl ASM_PFX(ArmReadMpidr)\r
+ // Keep a copy of the MpId register value\r
+ mov r10, r0\r
+\r
+// Check if we can install the stack at the top of the System Memory or if we need\r
+// to install the stacks at the bottom of the Firmware Device (case the FD is located\r
+// at the top of the DRAM)\r
+_SetupStackPosition:\r
+ // Compute Top of System Memory\r
+ ldr r12, =PcdGet64 (PcdSystemMemoryBase)\r
+ ldr r1, [r12]\r
+ ldr r12, =PcdGet64 (PcdSystemMemorySize)\r
+ ldrd r2, r3, [r12]\r
+\r
+ // calculate the top of memory, and record it in mSystemMemoryEnd\r
+ adds r2, r2, r1\r
+ sub r2, r2, #1\r
+ addcs r3, r3, #1\r
+ adr r12, mSystemMemoryEnd\r
+ strd r2, r3, [r12]\r
+\r
+ // truncate the memory used by UEFI to 4 GB range\r
+ teq r3, #0\r
+ movne r1, #-1\r
+ moveq r1, r2\r
+\r
+ // Calculate Top of the Firmware Device\r
+ ldr r12, =PcdGet64 (PcdFdBaseAddress)\r
+ ldr r2, [r12]\r
+ ldr r3, =FixedPcdGet32 (PcdFdSize)\r
+ sub r3, r3, #1\r
+ add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r
+\r
+ // UEFI Memory Size (stacks are allocated in this region)\r
+ LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r
+\r
+ //\r
+ // Reserve the memory for the UEFI region (contain stacks on its top)\r
+ //\r
+\r
+ // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r
+ subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r
+ bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r
+ cmp r0, r4\r
+ bge _SetupStack\r
+\r
+ // Case the top of stacks is the FdBaseAddress\r
+ mov r1, r2\r
+\r
+_SetupStack:\r
+ // r1 contains the top of the stack (and the UEFI Memory)\r
+\r
+ // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r
+ // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r
+ // top of the memory space)\r
+ adds r11, r1, #1\r
+ bcs _SetupOverflowStack\r
+\r
+_SetupAlignedStack:\r
+ mov r1, r11\r
+ b _GetBaseUefiMemory\r
+\r
+_SetupOverflowStack:\r
+ // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r
+ // aligned (4KB)\r
+ LoadConstantToReg (EFI_PAGE_MASK, r11)\r
+ and r11, r11, r1\r
+ sub r1, r1, r11\r
+\r
+_GetBaseUefiMemory:\r
+ // Calculate the Base of the UEFI Memory\r
+ sub r11, r1, r4\r
+\r
+_GetStackBase:\r
+ // r1 = The top of the Mpcore Stacks\r
+ // Stack for the primary core = PrimaryCoreStack\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ sub r12, r1, r2\r
+\r
+ // Stack for the secondary core = Number of Cores - 1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r
+ sub r0, r0, #1\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r
+ mul r1, r1, r0\r
+ sub r12, r12, r1\r
+\r
+ // r12 = The base of the MpCore Stacks (primary stack & secondary stacks)\r
+ mov r0, r12\r
+ mov r1, r10\r
+ //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
+ LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r
+ bl ASM_PFX(ArmPlatformStackSet)\r
+\r
+ // Is it the Primary Core ?\r
+ mov r0, r10\r
+ bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
+ cmp r0, #1\r
+ bne _PrepareArguments\r
+\r
+_PrepareArguments:\r
+ mov r0, r10\r
+ mov r1, r11\r
+ mov r2, r12\r
+\r
+ // Move sec startup address into a data register\r
+ // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
+ ldr r4, StartupAddr\r
+\r
+ // Jump to PrePiCore C code\r
+ // r0 = MpId\r
+ // r1 = UefiMemoryBase\r
+ // r2 = StacksBase\r
+ blx r4\r
+\r
+_NeverReturn:\r
+ b _NeverReturn\r
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