Enhance PciCfg2 driver to handle unaligned Pci access according to PI spec.

Remove the undefined logic to process gEfiStatusCodeSpecificDataGuid status code data.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7078 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c b/IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c
index 01bb6dfce8ee3b2e9df05a3737e895bfa84c3d4a..f29831563c083fd62d919a46896e87646ef4900d 100644 (file)
--- a/IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c
+++ b/IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/ReportStatusCodeLib.c
@@ -422,7 +422,7 @@ ReportStatusCodeWithExtendedData (
   is responsible for allocating a buffer large enough for the standard header and\r
   the extended data passed into this function.  The standard header is filled in\r
   with a GUID specified by ExtendedDataGuid.  If ExtendedDataGuid is NULL, then a\r
-  GUID of gEfiStatusCodeSpecificDatauid is used.  The status code is reported with\r
+  GUID of gEfiStatusCodeSpecificDataGuid is used.  The status code is reported with\r
   an instance specified by Instance and a caller ID specified by CallerId.  If\r
   CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.\r
 \r

diff --git a/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/DebugLib.c b/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/DebugLib.c
index 497d53457104ae2362f289c843a91f45c25ffcc2..4c62def93a97ecfe135006bc787531587225a621 100644 (file)
--- a/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/DebugLib.c
+++ b/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/DebugLib.c
@@ -163,9 +163,12 @@ DebugAssert (
     //\r
     AsciiStrCpy (Temp + AsciiStrLen (FileName) + 1, Description);\r
 \r
-    REPORT_STATUS_CODE_WITH_EXTENDED_DATA (\r
+    REPORT_STATUS_CODE_EX (\r
       (EFI_ERROR_CODE | EFI_ERROR_UNRECOVERED),\r
       (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_EC_ILLEGAL_SOFTWARE_STATE),\r
+      0,\r
+      NULL,\r
+      &gEfiStatusCodeDataTypeAssertGuid,\r
       AssertData,\r
       TotalSize\r
       );\r

diff --git a/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf b/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
index 07b4750af2ceb6e9f5cc8f0f14aad6f89126ecd0..689095917aadda32486301e93c239025c3821869 100644 (file)
--- a/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+++ b/IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
@@ -53,4 +53,6 @@
 \r
 [Guids.common]\r
   gEfiStatusCodeDataTypeDebugGuid\r
+  gEfiStatusCodeDataTypeAssertGuid\r
+  \r
   
\ No newline at end of file

diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf
index eb29457ebd2123e0e1ee1460ca812939ded027db..010d84021010c217a0f06b0b93d9c8f7a0ac7306 100644 (file)
--- a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf
+++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PcatSingleSegmentPciCfgPei.inf
@@ -55,13 +55,6 @@
   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfgDisable\r
   gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfg2Disable\r
 \r
-[FixedPcd.common]\r
-  ##\r
-  #  Disable ASSERT for unalign PCI IO access according to PI Volume 1 and PeiCis Spec\r
-  #  Spec has not this requirement.\r
-  ##\r
-       gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0E\r
-\r
 [Depex]\r
   TRUE\r
 \r

diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c
index 5becfe4701766da497117aa14cf4fb5babb68a8c..aaabfbb58af1b74d38cfe3530aa0045f3749c4cc 100644 (file)
--- a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c
+++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg.c
@@ -54,22 +54,47 @@ PciCfgRead (
   UINTN  PciLibAddress;\r
 \r
   PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
-  switch (Width) {\r
-    case EfiPeiPciCfgWidthUint8:\r
-      * (UINT8 *) Buffer = PciRead8 (PciLibAddress);\r
-      break;\r
 \r
-    case EfiPeiPciCfgWidthUint16:\r
-      * (UINT16 *) Buffer = PciRead16 (PciLibAddress);\r
-      break;\r
-\r
-    case EfiPeiPciCfgWidthUint32:\r
-      * (UINT32 *) Buffer = PciRead32 (PciLibAddress);\r
-      break;\r
-\r
-    default:\r
-      return EFI_INVALID_PARAMETER;\r
+  if (Width == EfiPeiPciCfgWidthUint8) {\r
+    *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
+  } else if (Width == EfiPeiPciCfgWidthUint16) {\r
+    if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
+      *((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
+    }\r
+  } else if (Width == EfiPeiPciCfgWidthUint32) {\r
+    if ((PciLibAddress & 0x03) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));\r
+    } else if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Unaligned Pci address access, break up the request into word by word.\r
+      //\r
+      WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));\r
+      WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
+      *((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
+      *((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);\r
+      *((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);\r
+    }\r
+  } else {\r
+    return EFI_INVALID_PARAMETER;\r
   }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
@@ -104,22 +129,47 @@ PciCfgWrite (
   UINTN  PciLibAddress;\r
 \r
   PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
-  switch (Width) {\r
-    case EfiPeiPciCfgWidthUint8:\r
-      PciWrite8 (PciLibAddress, *(UINT8 *) Buffer);\r
-      break;\r
-\r
-    case EfiPeiPciCfgWidthUint16:\r
-      PciWrite16 (PciLibAddress, *(UINT16 *) Buffer);\r
-      break;\r
 \r
-    case EfiPeiPciCfgWidthUint32:\r
-      PciWrite32 (PciLibAddress, *(UINT32 *) Buffer);\r
-      break;\r
-\r
-    default:\r
-      return EFI_INVALID_PARAMETER;\r
+  if (Width == EfiPeiPciCfgWidthUint8) {\r
+    PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
+  } else if (Width == EfiPeiPciCfgWidthUint16) {\r
+    if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
+      PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1)); \r
+    }\r
+  } else if (Width == EfiPeiPciCfgWidthUint32) {\r
+    if ((PciLibAddress & 0x03) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));\r
+    } else if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Unaligned Pci address access, break up the request into word by word.\r
+      //\r
+      PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));\r
+      PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
+      PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1)); \r
+      PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2)); \r
+      PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3)); \r
+    }\r
+  } else {\r
+    return EFI_INVALID_PARAMETER;\r
   }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
@@ -154,22 +204,46 @@ PciCfgModify (
   UINTN  PciLibAddress;\r
 \r
   PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
-  switch (Width) {\r
-    case EfiPeiPciCfgWidthUint8:\r
-      PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);\r
-      break;\r
-\r
-    case EfiPeiPciCfgWidthUint16:\r
+  if (Width == EfiPeiPciCfgWidthUint8) {\r
+    PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);\r
+  } else if (Width == EfiPeiPciCfgWidthUint16) {\r
+    if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
       PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);\r
-      break;\r
-\r
-    case EfiPeiPciCfgWidthUint32:\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);\r
+      PciAndThenOr8 (PciLibAddress + 1, (UINT8)~(ClearBits >> 8), (UINT8)(SetBits >> 8));\r
+    }\r
+  } else if (Width == EfiPeiPciCfgWidthUint32) {\r
+    if ((PciLibAddress & 0x03) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
       PciAndThenOr32 (PciLibAddress, (UINT32)~ClearBits, (UINT32)SetBits);\r
-      break;\r
-\r
-    default:\r
-      return EFI_INVALID_PARAMETER;\r
+    } else if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Unaligned Pci address access, break up the request into word by word.\r
+      //\r
+      PciAndThenOr16 (PciLibAddress, (UINT16)~ClearBits, (UINT16)SetBits);\r
+      PciAndThenOr16 (PciLibAddress + 2, (UINT16)~(ClearBits >> 16), (UINT16)(SetBits >> 16));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciAndThenOr8 (PciLibAddress, (UINT8)~ClearBits, (UINT8)SetBits);\r
+      PciAndThenOr8 (PciLibAddress + 1, (UINT8)~(ClearBits >> 8), (UINT8)(SetBits >> 8));\r
+      PciAndThenOr8 (PciLibAddress + 2, (UINT8)~(ClearBits >> 16), (UINT8)(SetBits >> 16));\r
+      PciAndThenOr8 (PciLibAddress + 3, (UINT8)~(ClearBits >> 24), (UINT8)(SetBits >> 24));\r
+    }\r
+  } else {\r
+    return EFI_INVALID_PARAMETER;\r
   }\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r

diff --git a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c
index 6dd47324ca38d28761a2314d40fc5e85646e6c2b..852476ddd01a8df622899d24a1be328d0678e68c 100644 (file)
--- a/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c
+++ b/IntelFrameworkModulePkg/Universal/PcatSingleSegmentPciCfgPei/PciCfg2.c
@@ -134,9 +134,39 @@ PciCfg2Read (
   if (Width == EfiPeiPciCfgWidthUint8) {\r
     *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
   } else if (Width == EfiPeiPciCfgWidthUint16) {\r
-    *((UINT16 *) Buffer) = PciRead16 (PciLibAddress);\r
+    if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
+      *((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
+    }\r
   } else if (Width == EfiPeiPciCfgWidthUint32) {\r
-    *((UINT32 *) Buffer) = PciRead32 (PciLibAddress);\r
+    if ((PciLibAddress & 0x03) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      WriteUnaligned32 (((UINT32 *) Buffer), PciRead32 (PciLibAddress));\r
+    } else if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Unaligned Pci address access, break up the request into word by word.\r
+      //\r
+      WriteUnaligned16 (((UINT16 *) Buffer), PciRead16 (PciLibAddress));\r
+      WriteUnaligned16 (((UINT16 *) Buffer + 1), PciRead16 (PciLibAddress + 2));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
+      *((UINT8 *) Buffer + 1) = PciRead8 (PciLibAddress + 1);\r
+      *((UINT8 *) Buffer + 2) = PciRead8 (PciLibAddress + 2);\r
+      *((UINT8 *) Buffer + 3) = PciRead8 (PciLibAddress + 3);\r
+    }\r
   } else {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
@@ -185,9 +215,39 @@ PciCfg2Write (
   if (Width == EfiPeiPciCfgWidthUint8) {\r
     PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
   } else if (Width == EfiPeiPciCfgWidthUint16) {\r
-    PciWrite16 (PciLibAddress, *((UINT16 *) Buffer));\r
+    if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
+      PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1)); \r
+    }\r
   } else if (Width == EfiPeiPciCfgWidthUint32) {\r
-    PciWrite32 (PciLibAddress, *((UINT32 *) Buffer));\r
+    if ((PciLibAddress & 0x03) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      PciWrite32 (PciLibAddress, ReadUnaligned32 ((UINT32 *) Buffer));\r
+    } else if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Unaligned Pci address access, break up the request into word by word.\r
+      //\r
+      PciWrite16 (PciLibAddress, ReadUnaligned16 ((UINT16 *) Buffer));\r
+      PciWrite16 (PciLibAddress + 2, ReadUnaligned16 ((UINT16 *) Buffer + 1));\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
+      PciWrite8 (PciLibAddress + 1, *((UINT8 *) Buffer + 1)); \r
+      PciWrite8 (PciLibAddress + 2, *((UINT8 *) Buffer + 2)); \r
+      PciWrite8 (PciLibAddress + 3, *((UINT8 *) Buffer + 3)); \r
+    }\r
   } else {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
@@ -247,13 +307,48 @@ PciCfg2Modify (
   if (Width == EfiPeiPciCfgWidthUint8) {\r
     PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
   } else if (Width == EfiPeiPciCfgWidthUint16) {\r
-    ClearValue16  = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
-    SetValue16    = ReadUnaligned16 ((UINT16 *) SetBits);\r
-    PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
+    if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      ClearValue16  = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
+      SetValue16    = ReadUnaligned16 ((UINT16 *) SetBits);\r
+      PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
+      PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));\r
+    }\r
   } else if (Width == EfiPeiPciCfgWidthUint32) {\r
-    ClearValue32  = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));\r
-    SetValue32    = ReadUnaligned32 ((UINT32 *) SetBits);\r
-    PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);\r
+    if ((PciLibAddress & 0x03) == 0) {\r
+      //\r
+      // Aligned Pci address access\r
+      //\r
+      ClearValue32  = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));\r
+      SetValue32    = ReadUnaligned32 ((UINT32 *) SetBits);\r
+      PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);\r
+    } else if ((PciLibAddress & 0x01) == 0) {\r
+      //\r
+      // Unaligned Pci address access, break up the request into word by word.\r
+      //\r
+      ClearValue16  = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
+      SetValue16    = ReadUnaligned16 ((UINT16 *) SetBits);\r
+      PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
+\r
+      ClearValue16  = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits + 1));\r
+      SetValue16    = ReadUnaligned16 ((UINT16 *) SetBits + 1);\r
+      PciAndThenOr16 (PciLibAddress + 2, ClearValue16, SetValue16);\r
+    } else {\r
+      //\r
+      // Unaligned Pci address access, break up the request into byte by byte.\r
+      //\r
+      PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
+      PciAndThenOr8 (PciLibAddress + 1, (UINT8) (~(*((UINT8 *) ClearBits + 1))), *((UINT8 *) SetBits + 1));\r
+      PciAndThenOr8 (PciLibAddress + 2, (UINT8) (~(*((UINT8 *) ClearBits + 2))), *((UINT8 *) SetBits + 2));\r
+      PciAndThenOr8 (PciLibAddress + 3, (UINT8) (~(*((UINT8 *) ClearBits + 3))), *((UINT8 *) SetBits + 3));\r
+    }\r
   } else {\r
     return EFI_INVALID_PARAMETER;\r
   }\r

diff --git a/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/DxeStatusCode.inf b/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/DxeStatusCode.inf
index 3c9501a8753a32b1ba79c68fb61db4774f8528d4..cb3328eab7e4012476bd0073531cbb7938f55d89 100644 (file)
--- a/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/DxeStatusCode.inf
+++ b/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/DxeStatusCode.inf
@@ -78,7 +78,6 @@
 [Guids]\r
   gEfiDataHubStatusCodeRecordGuid               # SOMETIMES_CONSUMED\r
   gMemoryStatusCodeRecordGuid                   # SOMETIMES_CONSUMED\r
-  gEfiStatusCodeSpecificDataGuid                # SOMETIMES_CONSUMED\r
   gEfiStatusCodeDataTypeDebugGuid               # PROTOCOL ALWAYS_CONSUMED\r
 \r
 [Protocols]\r

diff --git a/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/SerialStatusCodeWorker.c b/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/SerialStatusCodeWorker.c
index 166e70567dfce15827e13aef9af0eaf3e5f90611..52817283d943aea2f33ddb1a754dd6618d6d078b 100644 (file)
--- a/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/SerialStatusCodeWorker.c
+++ b/IntelFrameworkModulePkg/Universal/StatusCode/Dxe/SerialStatusCodeWorker.c
@@ -13,7 +13,6 @@
 **/\r
 \r
 #include "DxeStatusCode.h"\r
-#include "DebugInfo.h"\r
 \r
 EFI_SERIAL_IO_PROTOCOL *mSerialIoProtocol;\r
 \r
@@ -88,7 +87,6 @@ SerialStatusCodeReportWorker (
   UINT32          LineNumber;\r
   UINTN           CharCount;\r
   VA_LIST         Marker;\r
-  EFI_DEBUG_INFO  *DebugInfo;\r
   EFI_TPL         CurrentTpl;\r
 \r
 \r
@@ -130,17 +128,6 @@ SerialStatusCodeReportWorker (
                   Format, \r
                   Marker\r
                   );\r
-  } else if (Data != NULL && \r
-             CompareGuid (&Data->Type, &gEfiStatusCodeSpecificDataGuid) &&\r
-             (CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) {\r
-    //\r
-    // Print specific data into output buffer.\r
-    //\r
-    DebugInfo = (EFI_DEBUG_INFO *) (Data + 1);\r
-    Marker    = (VA_LIST) (DebugInfo + 1);\r
-    Format    = (CHAR8 *) (((UINT64 *) Marker) + 12);\r
-\r
-    CharCount = AsciiVSPrint (Buffer, EFI_STATUS_CODE_DATA_MAX_SIZE, Format, Marker);\r
   } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) {\r
     //\r
     // Print ERROR information into output buffer.\r

diff --git a/IntelFrameworkModulePkg/Universal/StatusCode/Pei/SerialStatusCodeWorker.c b/IntelFrameworkModulePkg/Universal/StatusCode/Pei/SerialStatusCodeWorker.c
index ad8b916e39710d57a03e70e81b292c2338413a00..111f9e3f2cb4670aecdb19ab9a202f610a10319f 100644 (file)
--- a/IntelFrameworkModulePkg/Universal/StatusCode/Pei/SerialStatusCodeWorker.c
+++ b/IntelFrameworkModulePkg/Universal/StatusCode/Pei/SerialStatusCodeWorker.c
@@ -12,7 +12,6 @@
 **/\r
 \r
 #include "PeiStatusCode.h"\r
-#include "DebugInfo.h"\r
 \r
 /**\r
   Convert status code value and extended data to readable ASCII string, send string to serial I/O device.\r
@@ -59,7 +58,6 @@ SerialStatusCodeReportWorker (
   UINT32          LineNumber;\r
   UINTN           CharCount;\r
   VA_LIST         Marker;\r
-  EFI_DEBUG_INFO  *DebugInfo;\r
 \r
   Buffer[0] = '\0';\r
 \r
@@ -87,17 +85,6 @@ SerialStatusCodeReportWorker (
                   Format,\r
                   Marker\r
                   );\r
-  } else if (Data != NULL &&\r
-             CompareGuid (&Data->Type, &gEfiStatusCodeSpecificDataGuid) &&\r
-             (CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) {\r
-    //\r
-    // Print specific data into output buffer.\r
-    //\r
-    DebugInfo = (EFI_DEBUG_INFO *) (Data + 1);\r
-    Marker    = (VA_LIST) (DebugInfo + 1);\r
-    Format    = (CHAR8 *) (((UINT64 *) Marker) + 12);\r
-\r
-    CharCount = AsciiVSPrint (Buffer, EFI_STATUS_CODE_DATA_MAX_SIZE, Format, Marker);\r
   } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) {\r
     //\r
     // Print ERROR information into output buffer.\r