]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg/AcpiTables: Change the ACPI PM Base Adress to 0xb000
authorjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>
Fri, 4 May 2012 15:02:33 +0000 (15:02 +0000)
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>
Fri, 4 May 2012 15:02:33 +0000 (15:02 +0000)
0xb000 is the address normally used with QEMU.

0x400 also appears to conflict with some debug I/O ports
used by QEMU.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Bei Guan <gbtju85@gmail.com>
Reviewed-by: Bei Guan <gbtju85@gmail.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13279 6f19259b-4bc3-4df7-8a09-765794883524

OvmfPkg/AcpiTables/Dsdt.asl
OvmfPkg/AcpiTables/Platform.h
OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c

index a0c762291e28432822c20eee731b63ae062f1ca4..32fc3d0f72f175c337cc43c3c8d21610cbaeafe7 100644 (file)
@@ -364,11 +364,11 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF    ", 3) {
             IO (Decode16, 0x278, 0x278, 0x00, 0x08)\r
             IO (Decode16, 0x370, 0x370, 0x00, 0x02)\r
             IO (Decode16, 0x378, 0x378, 0x00, 0x08)\r
-            IO (Decode16, 0x400, 0x400, 0x00, 0x40)       // PMBLK1\r
             IO (Decode16, 0x440, 0x440, 0x00, 0x10)\r
             IO (Decode16, 0x678, 0x678, 0x00, 0x08)\r
             IO (Decode16, 0x778, 0x778, 0x00, 0x08)\r
             IO (Decode16, 0xafe0, 0xafe0, 0x00, 0x04)     // QEMU GPE0 BLK\r
+            IO (Decode16, 0xb000, 0xb000, 0x00, 0x40)     // PMBLK1\r
             Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000)  // IO APIC\r
             Memory32Fixed (ReadOnly, 0xFEE00000, 0x1000)\r
           })\r
index a79bfd8703ea58c93d03ce0c455ad6a27e06d353..8bba992d019354bcd3bbfaaefdc9ab3f8ec4ea58 100644 (file)
 #define ACPI_ENABLE     0\r
 #define ACPI_DISABLE    0\r
 #define S4BIOS_REQ      0x00\r
-#define PM1a_EVT_BLK    0x00000400\r
+#define PM1a_EVT_BLK    0x0000b000\r
 #define PM1b_EVT_BLK    0x00000000\r
-#define PM1a_CNT_BLK    0x00000404\r
+#define PM1a_CNT_BLK    0x0000b004\r
 #define PM1b_CNT_BLK    0x00000000\r
 #define PM2_CNT_BLK     0x00000022\r
-#define PM_TMR_BLK      0x00000408\r
+#define PM_TMR_BLK      0x0000b008\r
 #define GPE0_BLK        0x0000afe0\r
 #define GPE1_BLK        0x00000000\r
 #define PM1_EVT_LEN     0x04\r
index a2f774f7ee6a8aa4c553c0402ba4c929a6460681..248eb9285a1764741e580c8c925c592f4527edd6 100644 (file)
@@ -24,7 +24,7 @@
 //\r
 // PIIX4 Power Management Base Address\r
 //\r
-UINT32 mPmba = 0x400;\r
+UINT32 mPmba = 0xb000;\r
 \r
 #define PCI_BAR_IO             0x1\r
 #define ACPI_TIMER_FREQUENCY   3579545\r