UefiCpuPkg: Refine casting expression result to bigger size

There are cases that the operands of an expression are all with rank less
than UINT64/INT64 and the result of the expression is explicitly cast to
UINT64/INT64 to fit the target size.

An example will be:
UINT32 a,b;
// a and b can be any unsigned int type with rank less than UINT64, like
// UINT8, UINT16, etc.
UINT64 c;
c = (UINT64) (a + b);

Some static code checkers may warn that the expression result might
overflow within the rank of "int" (integer promotions) and the result is
then cast to a bigger size.

The commit refines codes by the following rules:
1). When the expression is possible to overflow the range of unsigned int/
int:
c = (UINT64)a + b;

2). When the expression will not overflow within the rank of "int", remove
the explicit type casts:
c = a + b;

3). When the expression will be cast to pointer of possible greater size:
UINT32 a,b;
VOID *c;
c = (VOID *)(UINTN)(a + b); --> c = (VOID *)((UINTN)a + b);

4). When one side of a comparison expression contains only operands with
rank less than UINT32:
UINT8 a;
UINT16 b;
UINTN c;
if ((UINTN)(a + b) > c) {...} --> if (((UINT32)a + b) > c) {...}

For rule 4), if we remove the 'UINTN' type cast like:
if (a + b > c) {...}
The VS compiler will complain with warning C4018 (signed/unsigned
mismatch, level 3 warning) due to promoting 'a + b' to type 'int'.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

diff --git a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
index 60f4bbc1fde8d1ce96c5c500a814fe6ccfb70b67..d19349d4b0ff54e01d089346c249c6f9653502ae 100644 (file)
--- a/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
+++ b/UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.c
@@ -1,7 +1,7 @@
 /** @file\r
   Produces the CPU I/O 2 Protocol.\r
 \r
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials                          \r
@@ -141,7 +141,7 @@ CpuIoCheckParameter (
   //\r
   // Check to see if Address is aligned\r
   //\r
-  if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) {\r
+  if ((Address & ((UINT64)mInStride[Width] - 1)) != 0) {\r
     return EFI_UNSUPPORTED;\r
   }\r
 \r

diff --git a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c
index 7b1ad37515ce0452c20e48b90f15d1099c1e12c6..20b8350fe4a4e189a80dd64b05bd8de65af8cc73 100644 (file)
--- a/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c
+++ b/UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.c
@@ -1,7 +1,7 @@
 /** @file\r
   Produces the SMM CPU I/O Protocol.\r
 \r
-Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials                          \r
 are licensed and made available under the terms and conditions of the BSD License         \r
 which accompanies this distribution.  The full text of the license may be found at        \r
@@ -126,7 +126,7 @@ CpuIoCheckParameter (
   //\r
   // Check to see if Address is aligned\r
   //\r
-  if ((Address & (UINT64)(mStride[Width] - 1)) != 0) {\r
+  if ((Address & ((UINT64)mStride[Width] - 1)) != 0) {\r
     return EFI_UNSUPPORTED;\r
   }\r
 \r

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index bb123badc85d430661f1b1cd332f83f5e7b7a6ff..03937dcbe2bc59d7a1ee5c30221135950654a5e2 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -1,7 +1,7 @@
 /** @file\r
   SMM STM support functions\r
 \r
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -276,8 +276,8 @@ SmmCpuFeaturesInstallSmiHandler (
   UINT32                         RegEdx;\r
   EFI_PROCESSOR_INFORMATION      ProcessorInfo;\r
 \r
-  CopyMem ((VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));\r
-  Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + TXT_SMM_PSD_OFFSET);\r
+  CopyMem ((VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET), &gcStmPsd, sizeof (gcStmPsd));\r
+  Psd = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + TXT_SMM_PSD_OFFSET);\r
   Psd->SmmGdtPtr = GdtBase;\r
   Psd->SmmGdtSize = (UINT32)GdtSize;\r
 \r
@@ -317,7 +317,7 @@ SmmCpuFeaturesInstallSmiHandler (
   // Copy template to CPU specific SMI handler location\r
   //\r
   CopyMem (\r
-    (VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),\r
+    (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),\r
     (VOID*)gcStmSmiHandlerTemplate,\r
     gcStmSmiHandlerSize\r
     );\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index d5b89002bf3d8b702132779f16746c5b919227c1..d06148263c8e565a2081f044a0234ef6df1873b2 100755 (executable)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -1,7 +1,7 @@
 /** @file\r
 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r
 \r
-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
@@ -1282,7 +1282,7 @@ AllocateAlignedCodePages (
       Status = gSmst->SmmFreePages (Memory, UnalignedPages);\r
       ASSERT_EFI_ERROR (Status);\r
     }\r
-    Memory         = (EFI_PHYSICAL_ADDRESS) (AlignedMemory + EFI_PAGES_TO_SIZE (Pages));\r
+    Memory         = AlignedMemory + EFI_PAGES_TO_SIZE (Pages);\r
     UnalignedPages = RealPages - Pages - UnalignedPages;\r
     if (UnalignedPages > 0) {\r
       //\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c b/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c
index b4bc0ec6a53de92c813d01fe7eb1a13b0abfbff9..3188d438181ccbed40e9d981e62dd4b8dfe792a9 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c
@@ -1,7 +1,7 @@
 /** @file\r
 Provides services to access SMRAM Save State Map\r
 \r
-Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -690,7 +690,7 @@ InstallSmiHandler (
   //\r
   // Initialize PROCESSOR_SMM_DESCRIPTOR\r
   //\r
-  Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)(UINTN)(SmBase + SMM_PSD_OFFSET);\r
+  Psd = (PROCESSOR_SMM_DESCRIPTOR *)(VOID *)((UINTN)SmBase + SMM_PSD_OFFSET);\r
   CopyMem (Psd, &gcPsd, sizeof (gcPsd));\r
   Psd->SmmGdtPtr = (UINT64)GdtBase;\r
   Psd->SmmGdtSize = (UINT32)GdtSize;\r
@@ -731,7 +731,7 @@ InstallSmiHandler (
   // Copy template to CPU specific SMI handler location\r
   //\r
   CopyMem (\r
-    (VOID*)(UINTN)(SmBase + SMM_HANDLER_OFFSET),\r
+    (VOID*)((UINTN)SmBase + SMM_HANDLER_OFFSET),\r
     (VOID*)gcSmiHandlerTemplate,\r
     gcSmiHandlerSize\r
     );\r