--- /dev/null
+;------------------------------------------------------------------------------\r
+; @file\r
+; Transition from 16 bit real mode into 32 bit flat protected mode\r
+;\r
+; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+%define SEC_DEFAULT_CR0 0x40000023\r
+%define SEC_DEFAULT_CR4 0x640\r
+\r
+BITS 16\r
+\r
+;\r
+; Modified: EAX, EBX\r
+;\r
+TransitionFromReal16To32BitFlat:\r
+\r
+ debugShowPostCode POSTCODE_16BIT_MODE\r
+\r
+ cli\r
+\r
+ mov bx, 0xf000\r
+ mov ds, bx\r
+\r
+ mov bx, ADDR16_OF(gdtr)\r
+\r
+o32 lgdt [cs:bx]\r
+\r
+ mov eax, SEC_DEFAULT_CR0\r
+ mov cr0, eax\r
+\r
+ jmp LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)\r
+BITS 32\r
+jumpTo32BitAndLandHere:\r
+\r
+ mov eax, SEC_DEFAULT_CR4\r
+ mov cr4, eax\r
+\r
+ debugShowPostCode POSTCODE_32BIT_MODE\r
+\r
+ mov ax, LINEAR_SEL\r
+ mov ds, ax\r
+ mov es, ax\r
+ mov fs, ax\r
+ mov gs, ax\r
+ mov ss, ax\r
+\r
+ OneTimeCallRet TransitionFromReal16To32BitFlat\r
+\r
+ALIGN 2\r
+\r
+gdtr:\r
+ dw GDT_END - GDT_BASE - 1 ; GDT limit\r
+ dd ADDR_OF(GDT_BASE)\r
+\r
+ALIGN 16\r
+\r
+;\r
+; Macros for GDT entries\r
+;\r
+\r
+%define PRESENT_FLAG(p) (p << 7)\r
+%define DPL(dpl) (dpl << 5)\r
+%define SYSTEM_FLAG(s) (s << 4)\r
+%define DESC_TYPE(t) (t)\r
+\r
+; Type: data, expand-up, writable, accessed\r
+%define DATA32_TYPE 3\r
+\r
+; Type: execute, readable, expand-up, accessed\r
+%define CODE32_TYPE 0xb\r
+\r
+; Type: execute, readable, expand-up, accessed\r
+%define CODE64_TYPE 0xb\r
+\r
+%define GRANULARITY_FLAG(g) (g << 7)\r
+%define DEFAULT_SIZE32(d) (d << 6)\r
+%define CODE64_FLAG(l) (l << 5)\r
+%define UPPER_LIMIT(l) (l)\r
+\r
+;\r
+; The Global Descriptor Table (GDT)\r
+;\r
+\r
+GDT_BASE:\r
+; null descriptor\r
+NULL_SEL equ $-GDT_BASE\r
+ DW 0 ; limit 15:0\r
+ DW 0 ; base 15:0\r
+ DB 0 ; base 23:16\r
+ DB 0 ; sys flag, dpl, type\r
+ DB 0 ; limit 19:16, flags\r
+ DB 0 ; base 31:24\r
+\r
+; linear data segment descriptor\r
+LINEAR_SEL equ $-GDT_BASE\r
+ DW 0xffff ; limit 15:0\r
+ DW 0 ; base 15:0\r
+ DB 0 ; base 23:16\r
+ DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(DATA32_TYPE)\r
+ DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)\r
+ DB 0 ; base 31:24\r
+\r
+; linear code segment descriptor\r
+LINEAR_CODE_SEL equ $-GDT_BASE\r
+ DW 0xffff ; limit 15:0\r
+ DW 0 ; base 15:0\r
+ DB 0 ; base 23:16\r
+ DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE32_TYPE)\r
+ DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(1)|CODE64_FLAG(0)|UPPER_LIMIT(0xf)\r
+ DB 0 ; base 31:24\r
+\r
+%ifdef ARCH_X64\r
+; linear code (64-bit) segment descriptor\r
+LINEAR_CODE64_SEL equ $-GDT_BASE\r
+ DW 0xffff ; limit 15:0\r
+ DW 0 ; base 15:0\r
+ DB 0 ; base 23:16\r
+ DB PRESENT_FLAG(1)|DPL(0)|SYSTEM_FLAG(1)|DESC_TYPE(CODE64_TYPE)\r
+ DB GRANULARITY_FLAG(1)|DEFAULT_SIZE32(0)|CODE64_FLAG(1)|UPPER_LIMIT(0xf)\r
+ DB 0 ; base 31:24\r
+%endif\r
+\r
+GDT_END:\r
+\r
--- /dev/null
+;------------------------------------------------------------------------------\r
+; @file\r
+; Transition from 32 bit flat protected mode into 64 bit flat protected mode\r
+;\r
+; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+BITS 32\r
+\r
+;\r
+; Modified: EAX\r
+;\r
+Transition32FlatTo64Flat:\r
+\r
+ mov eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)\r
+ mov cr3, eax\r
+\r
+ mov eax, cr4\r
+ bts eax, 5 ; enable PAE\r
+ mov cr4, eax \r
+\r
+ mov ecx, 0xc0000080\r
+ rdmsr\r
+ bts eax, 8 ; set LME\r
+ wrmsr\r
+\r
+ mov eax, cr0\r
+ bts eax, 31 ; set PG\r
+ mov cr0, eax ; enable paging\r
+\r
+ jmp LINEAR_CODE64_SEL:ADDR_OF(jumpTo64BitAndLandHere)\r
+BITS 64\r
+jumpTo64BitAndLandHere:\r
+\r
+ debugShowPostCode POSTCODE_64BIT_MODE\r
+\r
+ OneTimeCallRet Transition32FlatTo64Flat\r
+\r
; @file\r
; This file includes all other code files to assemble the reset vector code\r
;\r
-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
%include "Ia32/SearchForSecEntry.asm"\r
\r
%ifdef ARCH_X64\r
-%include "Ia32/32FlatTo64Flat.asm"\r
+%include "Ia32/Flat32ToFlat64.asm"\r
%endif\r
\r
-%include "Ia16/16RealTo32Flat.asm"\r
+%include "Ia16/Real16ToFlat32.asm"\r
%include "Ia16/Init16.asm"\r
\r
%include "Main.asm"\r
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