Do not update the GL-GD5446 DRAM Control register during

InitializeGraphicsMode.  The update of this register would
cause the xorg-cirrus driver to mis-detect the size of
video memory for the QEMU cirrus video device.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8690 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c b/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c
index a2488472739b9258274238dbcc7c65914a0e5619..8b01f8c435d0058d8341af4173df703bf56680a0 100644 (file)
--- a/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c
+++ b/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c
@@ -770,6 +770,20 @@ InitializeGraphicsMode (
 {\r
   UINT8 Byte;\r
   UINTN Index;\r
 {\r
   UINT8 Byte;\r
   UINTN Index;\r

+  UINT16 DeviceId;\r
+\r
+  //\r
+  // Read the PCI Configuration Header from the PCI Device\r
+  //\r
+  ASSERT_EFI_ERROR (\r
+    Private->PciIo->Pci.Read (\r
+                        Private->PciIo,\r
+                        EfiPciIoWidthUint16,\r
+                        PCI_DEVICE_ID_OFFSET,\r
+                        1,\r
+                        &DeviceId\r
+                        )\r
+    );\r

 \r
   outw (Private, SEQ_ADDRESS_REGISTER, 0x1206);\r
   outw (Private, SEQ_ADDRESS_REGISTER, 0x0012);\r
 \r
   outw (Private, SEQ_ADDRESS_REGISTER, 0x1206);\r
   outw (Private, SEQ_ADDRESS_REGISTER, 0x0012);\r


@@ -778,9 +792,11 @@ InitializeGraphicsMode (
     outw (Private, SEQ_ADDRESS_REGISTER, ModeData->SeqSettings[Index]);\r
   }\r
 \r
     outw (Private, SEQ_ADDRESS_REGISTER, ModeData->SeqSettings[Index]);\r
   }\r
 \r

-  outb (Private, SEQ_ADDRESS_REGISTER, 0x0f);\r
-  Byte = (UINT8) ((inb (Private, SEQ_DATA_REGISTER) & 0xc7) ^ 0x30);\r
-  outb (Private, SEQ_DATA_REGISTER, Byte);\r
+  if (DeviceId != CIRRUS_LOGIC_5446_DEVICE_ID) {\r
+    outb (Private, SEQ_ADDRESS_REGISTER, 0x0f);\r
+    Byte = (UINT8) ((inb (Private, SEQ_DATA_REGISTER) & 0xc7) ^ 0x30);\r
+    outb (Private, SEQ_DATA_REGISTER, Byte);\r
+  }\r

 \r
   outb (Private, MISC_OUTPUT_REGISTER, ModeData->MiscSetting);\r
   outw (Private, GRAPH_ADDRESS_REGISTER, 0x0506);\r
 \r
   outb (Private, MISC_OUTPUT_REGISTER, ModeData->MiscSetting);\r
   outw (Private, GRAPH_ADDRESS_REGISTER, 0x0506);\r