+++ /dev/null
-#/* @file\r
-# Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#*/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = RTSMArmVExpressFoundationLib\r
- FILE_GUID = ce5d91ae-0893-11e2-b6bb-1c6f650265cc\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ArmPlatformLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmPkg/ArmPkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[LibraryClasses]\r
- IoLib\r
- ArmLib\r
- MemoryAllocationLib\r
- SerialPortLib\r
- PrintLib\r
- HobLib\r
-\r
-[Sources.common]\r
- RTSMFoundation.c\r
- RTSMFoundationMem.c\r
-\r
-[Sources.AARCH64]\r
- AArch64/RTSMHelper.S\r
-\r
-[FeaturePcd]\r
- gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
-\r
-[FixedPcd]\r
- gArmTokenSpaceGuid.PcdSystemMemoryBase\r
- gArmTokenSpaceGuid.PcdSystemMemorySize\r
-\r
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
- gArmTokenSpaceGuid.PcdArmPrimaryCore\r
-\r
- gArmPlatformTokenSpaceGuid.PcdCoreCount\r
+++ /dev/null
-#/* @file\r
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#*/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = RTSMArmVExpressFoundationLibSec\r
- FILE_GUID = bc6e6418-0894-11e2-9dc3-1c6f650265cc\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ArmPlatformLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmPkg/ArmPkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[LibraryClasses]\r
- IoLib\r
- ArmLib\r
- SerialPortLib\r
-\r
-[Sources.common]\r
- RTSMFoundation.c\r
-\r
-[Sources.AARCH64]\r
- AArch64/RTSMHelper.S\r
-\r
-[FeaturePcd]\r
- gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
-\r
-[FixedPcd]\r
- gArmTokenSpaceGuid.PcdSystemMemoryBase\r
- gArmTokenSpaceGuid.PcdSystemMemorySize\r
-\r
- gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r
- gArmTokenSpaceGuid.PcdArmPrimaryCore\r
-\r
- gArmPlatformTokenSpaceGuid.PcdCoreCount\r
+++ /dev/null
-/** @file\r
-*\r
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
-*\r
-* This program and the accompanying materials\r
-* are licensed and made available under the terms and conditions of the BSD License\r
-* which accompanies this distribution. The full text of the license may be found at\r
-* http://opensource.org/licenses/bsd-license.php\r
-*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-*\r
-**/\r
-\r
-#include <Library/IoLib.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-#include <Ppi/ArmMpCoreInfo.h>\r
-\r
-#include <ArmPlatform.h>\r
-\r
-ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {\r
- {\r
- // Cluster 0, Core 0\r
- 0x0, 0x0,\r
-\r
- // NOTE:\r
- // The foundation model does not have the VE_SYS_REGS like all the other VE\r
- // platforms. We pick a spot in RAM that *should* be safe in the simple case\r
- // of no UEFI apps interfering (Only the Linux loader getting used). By the\r
- // time we come to load Linux we should have all the cores in a safe place.\r
- // The image expects to be loaded at 0xa0000000. We also place the mailboxes\r
- // here as it does not matter if we corrupt the image at this time.\r
- // NOTE also see: "ArmVExpressSecLibRTSM/AArch64/RTSMFoundationBoot.S"\r
-\r
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (UINT64)0x0\r
-\r
- },\r
- {\r
- // Cluster 0, Core 1\r
- 0x0, 0x1,\r
-\r
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (UINT64)0x0\r
-\r
- },\r
- {\r
- // Cluster 0, Core 2\r
- 0x0, 0x2,\r
-\r
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (UINT64)0x0\r
- },\r
- {\r
- // Cluster 0, Core 3\r
- 0x0, 0x3,\r
-\r
- // MP Core MailBox Set/Get/Clear Addresses and Clear Value\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (EFI_PHYSICAL_ADDRESS)0xa0000000,\r
- (UINT64)0x0\r
- }\r
-};\r
-\r
-/**\r
- Return the current Boot Mode\r
-\r
- This function returns the boot reason on the platform\r
-\r
- @return Return the current Boot Mode of the platform\r
-\r
-**/\r
-EFI_BOOT_MODE\r
-ArmPlatformGetBootMode (\r
- VOID\r
- )\r
-{\r
- return BOOT_WITH_FULL_CONFIGURATION;\r
-}\r
-\r
-/**\r
- Initialize controllers that must setup in the normal world\r
-\r
- This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim\r
- in the PEI phase.\r
-\r
-**/\r
-RETURN_STATUS\r
-ArmPlatformInitialize (\r
- IN UINTN MpId\r
- )\r
-{\r
- /* The Foundation model has no SP810 to initialise. */\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Initialize the system (or sometimes called permanent) memory\r
-\r
- This memory is generally represented by the DRAM.\r
-\r
-**/\r
-VOID\r
-ArmPlatformInitializeSystemMemory (\r
- VOID\r
- )\r
-{\r
- // Nothing to do here\r
-}\r
-\r
-EFI_STATUS\r
-PrePeiCoreGetMpCoreInfo (\r
- OUT UINTN *CoreCount,\r
- OUT ARM_CORE_INFO **ArmCoreTable\r
- )\r
-{\r
- // Foundation model has no VE_SYS_REGS\r
- // Only support one cluster\r
- *CoreCount = ArmGetCpuCountPerCluster ();\r
- *ArmCoreTable = mVersatileExpressMpCoreInfoTable;\r
-\r
- return EFI_SUCCESS;\r
-}\r
-\r
-// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the context of PrePeiCore\r
-EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;\r
-ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };\r
-\r
-EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {\r
- {\r
- EFI_PEI_PPI_DESCRIPTOR_PPI,\r
- &mArmMpCoreInfoPpiGuid,\r
- &mMpCoreInfoPpi\r
- }\r
-};\r
-\r
-VOID\r
-ArmPlatformGetPlatformPpiList (\r
- OUT UINTN *PpiListSize,\r
- OUT EFI_PEI_PPI_DESCRIPTOR **PpiList\r
- )\r
-{\r
- *PpiListSize = sizeof(gPlatformPpiTable);\r
- *PpiList = gPlatformPpiTable;\r
-}\r
+++ /dev/null
-/** @file\r
-*\r
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
-*\r
-* This program and the accompanying materials\r
-* are licensed and made available under the terms and conditions of the BSD License\r
-* which accompanies this distribution. The full text of the license may be found at\r
-* http://opensource.org/licenses/bsd-license.php\r
-*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-*\r
-**/\r
-\r
-#include <Library/ArmPlatformLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/HobLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/MemoryAllocationLib.h>\r
-#include <ArmPlatform.h>\r
-\r
-// Number of Virtual Memory Map Descriptors\r
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5\r
-\r
-// DDR attributes\r
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
-\r
-/**\r
- Return the Virtual Memory Map of your platform\r
-\r
- This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r
-\r
- @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r
- Virtual Memory mapping. This array must be ended by a zero-filled\r
- entry\r
-\r
-**/\r
-VOID\r
-ArmPlatformGetVirtualMemoryMap (\r
- IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r
- )\r
-{\r
- ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;\r
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;\r
- UINTN Index = 0;\r
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
- EFI_VIRTUAL_ADDRESS SparseMemoryBase;\r
- UINT64 SparseMemorySize;\r
-\r
- ASSERT(VirtualMemoryMap != NULL);\r
-\r
- ResourceAttributes =\r
- EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
- EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
- EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
- EFI_RESOURCE_ATTRIBUTE_TESTED;\r
-\r
- // Declared the additional DRAM from 2GB to 8GB\r
- SparseMemoryBase = 0x0880000000;\r
- SparseMemorySize = SIZE_2GB + SIZE_4GB;\r
-\r
- BuildResourceDescriptorHob (\r
- EFI_RESOURCE_SYSTEM_MEMORY,\r
- ResourceAttributes,\r
- SparseMemoryBase,\r
- SparseMemorySize);\r
-\r
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
- if (VirtualMemoryTable == NULL) {\r
- return;\r
- }\r
-\r
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
- } else {\r
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
- }\r
-\r
- // DDR\r
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_DRAM_BASE;\r
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;\r
- VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;\r
- VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
-\r
- // CPU peripherals. TRM. Manual says not all of them are implemented.\r
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;\r
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;\r
- VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
-\r
- // Peripheral CS2 and CS3\r
- VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r
- VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
-\r
- // Map sparse memory region if present\r
- VirtualMemoryTable[++Index].PhysicalBase = SparseMemoryBase;\r
- VirtualMemoryTable[Index].VirtualBase = SparseMemoryBase;\r
- VirtualMemoryTable[Index].Length = SparseMemorySize;\r
- VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
-\r
- // End of Table\r
- VirtualMemoryTable[++Index].PhysicalBase = 0;\r
- VirtualMemoryTable[Index].VirtualBase = 0;\r
- VirtualMemoryTable[Index].Length = 0;\r
- VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
-\r
- *VirtualMemoryMap = VirtualMemoryTable;\r
-}\r
+++ /dev/null
-#/* @file\r
-#\r
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#*/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = RTSMArmVExpressFoundationSecLib\r
- FILE_GUID = 9de85c42-0894-11e2-8ed6-1c6f650265cc\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = ArmPlatformSecLib\r
-\r
-[Packages]\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- ArmPkg/ArmPkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[LibraryClasses]\r
- IoLib\r
- ArmLib\r
- SerialPortLib\r
-\r
-[Sources.common]\r
- RTSMFoundationSec.c\r
-\r
-[Sources.AARCH64]\r
- AArch64/RTSMFoundationBoot.S\r
-\r
-[FixedPcd]\r
- gArmTokenSpaceGuid.PcdFvBaseAddress\r
+++ /dev/null
-/** @file\r
-*\r
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
-*\r
-* This program and the accompanying materials\r
-* are licensed and made available under the terms and conditions of the BSD License\r
-* which accompanies this distribution. The full text of the license may be found at\r
-* http://opensource.org/licenses/bsd-license.php\r
-*\r
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-*\r
-**/\r
-\r
-#include <Library/IoLib.h>\r
-#include <Library/ArmPlatformLib.h>\r
-#include <Library/DebugLib.h>\r
-#include <Library/PcdLib.h>\r
-\r
-#include <Drivers/PL310L2Cache.h>\r
-#include <Drivers/SP804Timer.h>\r
-\r
-#include <ArmPlatform.h>\r
-\r
-/**\r
- Initialize the Secure peripherals and memory regions\r
-\r
- If Trustzone is supported by your platform then this function makes the required initialization\r
- of the secure peripherals and memory regions.\r
-\r
-**/\r
-VOID\r
-ArmPlatformSecTrustzoneInit (\r
- IN UINTN MpId\r
- )\r
-{\r
- // No TZPC or TZASC on RTSM to initialize\r
-}\r
-\r
-/**\r
- Initialize controllers that must setup at the early stage\r
-\r
- Some peripherals must be initialized in Secure World.\r
- For example, some L2x0 requires to be initialized in Secure World\r
-\r
-**/\r
-RETURN_STATUS\r
-ArmPlatformSecInitialize (\r
- IN UINTN MpId\r
- )\r
-{\r
- /* The Foundation model has no SP810 to initialise. */\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Call before jumping to Normal World\r
-\r
- This function allows the firmware platform to do extra actions before\r
- jumping to the Normal World\r
-\r
-**/\r
-VOID\r
-ArmPlatformSecExtraAction (\r
- IN UINTN MpId,\r
- OUT UINTN* JumpAddress\r
- )\r
-{\r
- *JumpAddress = PcdGet64 (PcdFvBaseAddress);\r
-}\r