Arm Packages: Fix builds for XCODE32 toolchain

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12509 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S b/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S
index 96acde19e85e6aef89e3c929e189d4e857cab7da..ad28d10ce282de056f08ff2eff4147e084bb9b0c 100644 (file)
--- a/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S
+++ b/ArmPkg/Drivers/ArmCpuLib/Arm11MpCoreLib/Arm11Helper.S
@@ -27,7 +27,7 @@ ASM_PFX(ArmCpuSynchronizeWait):
   cmp   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT\r
   // The SCU enabled is the event to tell us the Init Boot Memory is initialized\r
   bx    lr\r
-  b     CArmCpuSynchronizeWait\r
+  b     ASM_PFX(CArmCpuSynchronizeWait)\r
 \r
 \r
 #if 0\r
@@ -43,7 +43,7 @@ ASM_PFX(ArmCpuSynchronizeWait):
   cmp   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT\r
   // The SCU enabled is the event to tell us the Init Boot Memory is initialized\r
   beq   ArmWaitScuEnabled\r
-  b     CArmCpuSynchronizeWait\r
+  b     ASM_PFX(CArmCpuSynchronizeWait)\r
 \r
 // IN None\r
 // OUT r0 = SCU Base Address\r

diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S
index 6b3020a93ca1cc762cc6df07240c9f4611b9477c..b3e0597ddda2807a8f0864853020598fbf87e29d 100644 (file)
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA15Lib/ArmCortexA15Helper.S
@@ -34,11 +34,11 @@ ASM_PFX(ArmCpuSynchronizeWait):
   cmp   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT\r
   // The SCU enabled is the event to tell us the Init Boot Memory is initialized\r
   beq   ArmWaitGicDistributorEnabled\r
-  b     CArmCpuSynchronizeWait\r
+  bx    ASM_PFX(CArmCpuSynchronizeWait)\r
 \r
 // IN  None\r
 ArmWaitGicDistributorEnabled:\r
-  LoadConstantToReg (_gPcd_FixedAtBuild_PcdGicDistributorBase, r0)\r
+  LoadConstantToReg (ASM_PFX(_gPcd_FixedAtBuild_PcdGicDistributorBase), r0)\r
   ldr   r0, [r0]\r
 _WaitGicDistributor:\r
   ldr   r1, [r0, #ARM_GIC_ICDDCR]\r

diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S
index 0d6a62b7400271f4fb6b8d24b318fdcf766b8894..a66e8e78568053976cebf1959c40e88232f926a9 100644 (file)
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S
@@ -28,8 +28,8 @@ GCC_ASM_IMPORT(CArmCpuSynchronizeWait)
 ASM_PFX(ArmCpuSynchronizeWait):\r
   cmp   r0, #ARM_CPU_EVENT_BOOT_MEM_INIT\r
   // The SCU enabled is the event to tell us the Init Boot Memory is initialized\r
-  beq   ArmWaitScuEnabled\r
-  b     CArmCpuSynchronizeWait\r
+  beq   ASM_PFX(ArmWaitScuEnabled)\r
+  b     ASM_PFX(CArmCpuSynchronizeWait)\r
 \r
 // IN None\r
 // OUT r0 = SCU Base Address\r
@@ -48,5 +48,5 @@ ASM_PFX(ArmWaitScuEnabled):
   add   r0, r0, #A9_SCU_CONTROL_OFFSET\r
   ldr   r0, [r0]\r
   cmp   r0, #1\r
-  bne   ArmWaitScuEnabled\r
+  bne   ASM_PFX(ArmWaitScuEnabled)\r
   bx    lr\r

diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
index 9ef3430aaaa596d7ecd9e4c6afd697556a95944c..644c65466508df7974fb73f105ceb46986c3ded7 100644 (file)
--- a/ArmPkg/Include/AsmMacroIoLib.h
+++ b/ArmPkg/Include/AsmMacroIoLib.h
@@ -119,6 +119,21 @@
   .long (_Data)           ;                 \\r
 1:\r
 \r
+// Convert the (ClusterId,CoreId) into a Core Position\r
+// We assume there are 4 cores per cluster\r
+#define GetCorePositionInStack(Pos, MpId, Tmp) \\r
+  lsr   Pos, MpId, #6 ;                        \\r
+  and   Tmp, MpId, #3 ;                        \\r
+  add   Pos, Pos, Tmp\r
+\r
+// Reserve a region at the top of the Primary Core stack\r
+// for Global variables for the XIP phase\r
+#define SetPrimaryStack(StackTop, GlobalSize, Tmp)  \\r
+  and     Tmp, GlobalSize, #7         ;             \\r
+  rsbne   Tmp, Tmp, #8                ;             \\r
+  add     GlobalSize, GlobalSize, Tmp ;             \\r
+  sub     sp, StackTop, GlobalSize\r
+\r
 \r
 #elif defined (__GNUC__)\r
 \r

diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
index d6f3f1b709cd6dc724402a556e623b9784318c8d..61295a6580751b97d86ff1921dca93e23ad6c7ae 100644 (file)
--- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
+++ b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c
@@ -184,7 +184,7 @@ GetPerformanceCounterProperties (
 \r
   if (EndValue != NULL) {\r
     // Timer counts down to 0x0\r
-    *EndValue = 0xFFFFFFFFFFFFFFFF;;\r
+    *EndValue = 0xFFFFFFFFFFFFFFFFUL;\r
   }\r
 \r
   return (UINT64)ArmArchTimerGetTimerFreq ();\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
index d2c13a9ff7f9620099f46329e10fd9e22e7dc2c1..73aff703b3b0c09fcd9637836acd3e4bba6fe16a 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.dsc
@@ -68,7 +68,7 @@
 \r
   GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4\r
   \r
-  XCODE:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4\r
+  XCODE:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/CTA9x4\r
 \r
 ################################################################################\r
 #\r

diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
index f2a96cb968ba05e50d4bbf7c2c8959e3e4565509..c4da8a1f18b8ac0bed6ca595f909d080075d9857 100644 (file)
--- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
+++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.dsc
@@ -56,7 +56,7 @@
 
   GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
   
-  XCODE:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
+  XCODE:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
 
 ################################################################################
 #

diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
index e19102e72f5bb6d53519894f213ed4fd17cceb5d..bb1d99449f2c09a26b2434e4f46ef9d414cd5277 100755 (executable)
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
@@ -77,7 +77,7 @@ _SetupStack:
 _GetStackBase:\r
   // Compute Base of Normal stacks for CPU Cores\r
   // Is it MpCore system\r
-  bl    ArmIsMpCore\r
+  bl    ASM_PFX(ArmIsMpCore)\r
   cmp   r0, #0\r
   // Case it is not an MP Core system. Just setup the primary core\r
   beq   _SetupUnicoreStack\r

diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S
index f92a2dffbaf9dd6de892aaf65855513a3d05b2b6..87de96e916dc44962dfd583d99fa8963d83abf55 100644 (file)
--- a/ArmPlatformPkg/Sec/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.S
@@ -42,7 +42,7 @@ ASM_PFX(_ModuleEntryPoint):
   blx   ASM_PFX(ArmPlatformSecBootAction)\r
 \r
   // Set VBAR to the start of the exception vectors in Secure Mode\r
-  ldr   r0, =SecVectorTable\r
+  LoadConstantToReg (ASM_PFX(SecVectorTable), r0)\r
   bl    ASM_PFX(ArmWriteVBar)\r
 \r
 _IdentifyCpu:\r