ShellPkg: acpiview: ACPI 6.3 update for MADT parser

The ACPI 6.3 specification introduces a 'SPE overflow
Interrupt' field as part of the GICC structure.

Update the MADT parser to decode this field and validate
the interrupt ID used.

References:
- ACPI 6.3 Specification - January 2019
- Arm Generic Interrupt Controller Architecture Specification,
  GIC architecture version 3 and version 4, issue E
- Arm Server Base System Architecture 5.0

Signed-off-by: Krzysztof Koch <krzysztof.koch@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>

diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
index a1bf86ade5313f954a77b325c13394cfce133939..59c3df0cc8a080497b517baf36fc63f1e4ab866f 100644 (file)
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
@@ -1,17 +1,21 @@
 /** @file\r
   MADT table parser\r
 \r
-  Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.\r
+  Copyright (c) 2016 - 2019, ARM Limited. All rights reserved.\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
   @par Reference(s):\r
-    - ACPI 6.2 Specification - Errata A, September 2017\r
+    - ACPI 6.3 Specification - January 2019\r
+    - Arm Generic Interrupt Controller Architecture Specification,\r
+      GIC architecture version 3 and version 4, issue E\r
+    - Arm Server Base System Architecture 5.0\r
 **/\r
 \r
 #include <IndustryStandard/Acpi.h>\r
 #include <Library/UefiLib.h>\r
 #include "AcpiParser.h"\r
 #include "AcpiTableParser.h"\r
+#include "MadtParser.h"\r
 \r
 // Local Variables\r
 STATIC CONST UINT8* MadtInterruptControllerType;\r
@@ -33,6 +37,21 @@ ValidateGICDSystemVectorBase (
   IN VOID*  Context\r
   );\r
 \r
+/**\r
+  This function validates the SPE Overflow Interrupt in the GICC.\r
+\r
+  @param [in] Ptr     Pointer to the start of the field data.\r
+  @param [in] Context Pointer to context specific information e.g. this\r
+                      could be a pointer to the ACPI table header.\r
+**/\r
+STATIC\r
+VOID\r
+EFIAPI\r
+ValidateSpeOverflowInterrupt (\r
+  IN UINT8* Ptr,\r
+  IN VOID*  Context\r
+  );\r
+\r
 /**\r
   An ACPI_PARSER array describing the GICC Interrupt Controller Structure.\r
 **/\r
@@ -56,7 +75,9 @@ STATIC CONST ACPI_PARSER GicCParser[] = {
   {L"MPIDR", 8, 68, L"0x%lx", NULL, NULL, NULL, NULL},\r
   {L"Processor Power Efficiency Class", 1, 76, L"0x%x", NULL, NULL, NULL,\r
    NULL},\r
-  {L"Reserved", 3, 77, L"%x %x %x", Dump3Chars, NULL, NULL, NULL}\r
+  {L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL},\r
+  {L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,\r
+    ValidateSpeOverflowInterrupt, NULL}\r
 };\r
 \r
 /**\r
@@ -160,6 +181,55 @@ ValidateGICDSystemVectorBase (
   }\r
 }\r
 \r
+/**\r
+  This function validates the SPE Overflow Interrupt in the GICC.\r
+\r
+  @param [in] Ptr     Pointer to the start of the field data.\r
+  @param [in] Context Pointer to context specific information e.g. this\r
+                      could be a pointer to the ACPI table header.\r
+**/\r
+STATIC\r
+VOID\r
+EFIAPI\r
+ValidateSpeOverflowInterrupt (\r
+  IN UINT8* Ptr,\r
+  IN VOID*  Context\r
+  )\r
+{\r
+  UINT16 SpeOverflowInterrupt;\r
+\r
+  SpeOverflowInterrupt = *(UINT16*)Ptr;\r
+\r
+  // SPE not supported by this processor\r
+  if (SpeOverflowInterrupt == 0) {\r
+    return;\r
+  }\r
+\r
+  if ((SpeOverflowInterrupt < ARM_PPI_ID_MIN) ||\r
+      ((SpeOverflowInterrupt > ARM_PPI_ID_MAX) &&\r
+       (SpeOverflowInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||\r
+      (SpeOverflowInterrupt > ARM_PPI_ID_EXTENDED_MAX)) {\r
+    IncrementErrorCount ();\r
+    Print (\r
+      L"\nERROR: SPE Overflow Interrupt ID of %d is not in the allowed PPI ID "\r
+        L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",\r
+      SpeOverflowInterrupt,\r
+      ARM_PPI_ID_MIN,\r
+      ARM_PPI_ID_MAX,\r
+      ARM_PPI_ID_EXTENDED_MIN,\r
+      ARM_PPI_ID_EXTENDED_MAX\r
+    );\r
+  } else if (SpeOverflowInterrupt != ARM_PPI_ID_PMBIRQ) {\r
+    IncrementWarningCount();\r
+    Print (\r
+      L"\nWARNING: SPE Overflow Interrupt ID of %d is not compliant with SBSA "\r
+        L"Level 3 PPI ID assignment: %d.",\r
+      SpeOverflowInterrupt,\r
+      ARM_PPI_ID_PMBIRQ\r
+    );\r
+  }\r
+}\r
+\r
 /**\r
   This function parses the ACPI MADT table.\r
   When trace is enabled this function parses the MADT table and\r
@@ -233,7 +303,7 @@ ParseAcpiMadt (
     }\r
 \r
     switch (*MadtInterruptControllerType) {\r
-      case EFI_ACPI_6_2_GIC: {\r
+      case EFI_ACPI_6_3_GIC: {\r
         ParseAcpi (\r
           TRUE,\r
           2,\r
@@ -245,7 +315,7 @@ ParseAcpiMadt (
         break;\r
       }\r
 \r
-      case EFI_ACPI_6_2_GICD: {\r
+      case EFI_ACPI_6_3_GICD: {\r
         if (++GICDCount > 1) {\r
           IncrementErrorCount ();\r
           Print (\r
@@ -265,7 +335,7 @@ ParseAcpiMadt (
         break;\r
       }\r
 \r
-      case EFI_ACPI_6_2_GIC_MSI_FRAME: {\r
+      case EFI_ACPI_6_3_GIC_MSI_FRAME: {\r
         ParseAcpi (\r
           TRUE,\r
           2,\r
@@ -277,7 +347,7 @@ ParseAcpiMadt (
         break;\r
       }\r
 \r
-      case EFI_ACPI_6_2_GICR: {\r
+      case EFI_ACPI_6_3_GICR: {\r
         ParseAcpi (\r
           TRUE,\r
           2,\r
@@ -289,7 +359,7 @@ ParseAcpiMadt (
         break;\r
       }\r
 \r
-      case EFI_ACPI_6_2_GIC_ITS: {\r
+      case EFI_ACPI_6_3_GIC_ITS: {\r
         ParseAcpi (\r
           TRUE,\r
           2,\r

diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.h b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.h
new file mode 100644 (file)
index 0000000..fbbc43e
--- /dev/null
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.h
@@ -0,0 +1,40 @@
+/** @file\r
+  Header file for MADT table parser\r
+\r
+  Copyright (c) 2019, ARM Limited. All rights reserved.\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+  @par Reference(s):\r
+    - Arm Generic Interrupt Controller Architecture Specification,\r
+      GIC architecture version 3 and version 4, issue E\r
+    - Arm Server Base System Architecture 5.0\r
+**/\r
+\r
+#ifndef MADT_PARSER_H_\r
+#define MADT_PARSER_H_\r
+\r
+///\r
+/// Level 3 base server system Private Peripheral Inerrupt (PPI) ID assignments\r
+///\r
+#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTP       30\r
+#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTPS      29\r
+#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTHV      28\r
+#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTV       27\r
+#define ARM_PPI_ID_OVERFLOW_INTERRUPT_FROM_CNTHP      26\r
+#define ARM_PPI_ID_GIC_MAINTENANCE_INTERRUPT          25\r
+#define ARM_PPI_ID_CTIIRQ                             24\r
+#define ARM_PPI_ID_PERFORMANCE_MONITORS_INTERRUPT     23\r
+#define ARM_PPI_ID_COMMIRQ                            22\r
+#define ARM_PPI_ID_PMBIRQ                             21\r
+#define ARM_PPI_ID_CNTHPS                             20\r
+#define ARM_PPI_ID_CNTHVS                             19\r
+\r
+///\r
+/// PPI ID allowed ranges\r
+///\r
+#define ARM_PPI_ID_MAX              31\r
+#define ARM_PPI_ID_MIN              16\r
+#define ARM_PPI_ID_EXTENDED_MAX     1119\r
+#define ARM_PPI_ID_EXTENDED_MIN     1056\r
+\r
+#endif // MADT_PARSER_H_\r