--- /dev/null
+/** @file\r
+\r
+This file contains just some basic definitions that are needed by drivers\r
+that dealing with ATA/ATAPI interface.\r
+\r
+\r
+Copyright (c) 2007, Intel Corporation\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _ATAPI_H\r
+#define _ATAPI_H\r
+\r
+#pragma pack(push, 1)\r
+\r
+//\r
+// ATA_IDENTIFY_DATA is defined in ATA-5\r
+//\r
+typedef struct {\r
+ UINT16 config; /* General Configuration */\r
+ UINT16 cylinders; /* Number of Cylinders */\r
+ UINT16 reserved_2;\r
+ UINT16 heads; /* Number of logical heads */\r
+ UINT16 vendor_data1;\r
+ UINT16 vendoe_data2;\r
+ UINT16 sectors_per_track;\r
+ UINT16 vendor_specific_7_9[3];\r
+ CHAR8 SerialNo[20]; /* ASCII */\r
+ UINT16 vendor_specific_20_21[2];\r
+ UINT16 ecc_bytes_available;\r
+ CHAR8 FirmwareVer[8]; /* ASCII */\r
+ CHAR8 ModelName[40]; /* ASCII */\r
+ UINT16 multi_sector_cmd_max_sct_cnt;\r
+ UINT16 reserved_48;\r
+ UINT16 capabilities;\r
+ UINT16 reserved_50;\r
+ UINT16 pio_cycle_timing;\r
+ UINT16 reserved_52;\r
+ UINT16 field_validity;\r
+ UINT16 current_cylinders;\r
+ UINT16 current_heads;\r
+ UINT16 current_sectors;\r
+ UINT16 CurrentCapacityLsb;\r
+ UINT16 CurrentCapacityMsb;\r
+ UINT16 reserved_59;\r
+ UINT16 user_addressable_sectors_lo;\r
+ UINT16 user_addressable_sectors_hi;\r
+ UINT16 reserved_62;\r
+ UINT16 multi_word_dma_mode;\r
+ UINT16 advanced_pio_modes;\r
+ UINT16 min_multi_word_dma_cycle_time;\r
+ UINT16 rec_multi_word_dma_cycle_time;\r
+ UINT16 min_pio_cycle_time_without_flow_control;\r
+ UINT16 min_pio_cycle_time_with_flow_control;\r
+ UINT16 reserved_69_79[11];\r
+ UINT16 major_version_no;\r
+ UINT16 minor_version_no;\r
+ UINT16 command_set_supported_82; // word 82\r
+ UINT16 command_set_supported_83; // word 83\r
+ UINT16 command_set_feature_extn; // word 84\r
+ UINT16 command_set_feature_enb_85; // word 85\r
+ UINT16 command_set_feature_enb_86; // word 86\r
+ UINT16 command_set_feature_default; // word 87\r
+ UINT16 ultra_dma_mode; // word 88\r
+ UINT16 reserved_89_127[39];\r
+ UINT16 security_status;\r
+ UINT16 vendor_data_129_159[31];\r
+ UINT16 reserved_160_255[96];\r
+} ATA_IDENTIFY_DATA;\r
+\r
+//\r
+// ATAPI_IDENTIFY_DATA is defined in ATA-6\r
+//\r
+typedef struct {\r
+ UINT16 config; // General Configuration\r
+ UINT16 obsolete_1;\r
+ UINT16 specific_config;\r
+ UINT16 obsolete_3;\r
+ UINT16 retired_4_5[2];\r
+ UINT16 obsolete_6;\r
+ UINT16 cfa_reserved_7_8[2];\r
+ UINT16 retired_9;\r
+ CHAR8 SerialNo[20]; // ASCII\r
+ UINT16 retired_20_21[2];\r
+ UINT16 obsolete_22;\r
+ CHAR8 FirmwareVer[8]; // ASCII\r
+ CHAR8 ModelName[40]; // ASCII\r
+ UINT16 multi_sector_cmd_max_sct_cnt;\r
+ UINT16 reserved_48;\r
+ UINT16 capabilities_49;\r
+ UINT16 capabilities_50;\r
+ UINT16 obsolete_51_52[2];\r
+ UINT16 field_validity;\r
+ UINT16 obsolete_54_58[5];\r
+ UINT16 mutil_sector_setting;\r
+ UINT16 user_addressable_sectors_lo;\r
+ UINT16 user_addressable_sectors_hi;\r
+ UINT16 obsolete_62;\r
+ UINT16 multi_word_dma_mode;\r
+ UINT16 advanced_pio_modes;\r
+ UINT16 min_multi_word_dma_cycle_time;\r
+ UINT16 rec_multi_word_dma_cycle_time;\r
+ UINT16 min_pio_cycle_time_without_flow_control;\r
+ UINT16 min_pio_cycle_time_with_flow_control;\r
+ UINT16 reserved_69_74[6];\r
+ UINT16 queue_depth;\r
+ UINT16 reserved_76_79[4];\r
+ UINT16 major_version_no;\r
+ UINT16 minor_version_no;\r
+ UINT16 cmd_set_support_82;\r
+ UINT16 cmd_set_support_83;\r
+ UINT16 cmd_feature_support;\r
+ UINT16 cmd_feature_enable_85;\r
+ UINT16 cmd_feature_enable_86;\r
+ UINT16 cmd_feature_default;\r
+ UINT16 ultra_dma_select;\r
+ UINT16 time_required_for_sec_erase;\r
+ UINT16 time_required_for_enhanced_sec_erase;\r
+ UINT16 current_advanced_power_mgmt_value;\r
+ UINT16 master_pwd_revison_code;\r
+ UINT16 hardware_reset_result;\r
+ UINT16 current_auto_acoustic_mgmt_value;\r
+ UINT16 reserved_95_99[5];\r
+ UINT16 max_user_lba_for_48bit_addr[4];\r
+ UINT16 reserved_104_126[23];\r
+ UINT16 removable_media_status_notification_support;\r
+ UINT16 security_status;\r
+ UINT16 vendor_data_129_159[31];\r
+ UINT16 cfa_power_mode;\r
+ UINT16 cfa_reserved_161_175[15];\r
+ UINT16 current_media_serial_no[30];\r
+ UINT16 reserved_206_254[49];\r
+ UINT16 integrity_word;\r
+} ATAPI_IDENTIFY_DATA;\r
+\r
+\r
+typedef struct {\r
+ UINT8 peripheral_type;\r
+ UINT8 RMB;\r
+ UINT8 version;\r
+ UINT8 response_data_format;\r
+ UINT8 addnl_length;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 reserved_7;\r
+ UINT8 vendor_info[8];\r
+ UINT8 product_id[12];\r
+ UINT8 eeprom_product_code[4];\r
+ UINT8 firmware_rev_level[4];\r
+ UINT8 firmware_sub_rev_level[1];\r
+ UINT8 reserved_37;\r
+ UINT8 reserved_38;\r
+ UINT8 reserved_39;\r
+ UINT8 max_capacity_hi;\r
+ UINT8 max_capacity_mid;\r
+ UINT8 max_capacity_lo;\r
+ UINT8 reserved_43_95[95 - 43 + 1];\r
+ //\r
+ // Some more fields\r
+ //\r
+ UINT8 vendor_id[20];\r
+ UINT8 eeprom_drive_sno[12];\r
+} ATAPI_INQUIRY_DATA;\r
+\r
+typedef struct {\r
+ UINT8 peripheral_type;\r
+ UINT8 RMB;\r
+ UINT8 version;\r
+ UINT8 response_data_format;\r
+ UINT8 addnl_length;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 reserved_7;\r
+ UINT8 vendor_info[8];\r
+ UINT8 product_id[16];\r
+ UINT8 product_revision_level[4];\r
+ UINT8 vendor_specific[20];\r
+ UINT8 reserved_56_95[40];\r
+} ATAPI_CDROM_INQUIRY_DATA;\r
+\r
+\r
+typedef struct {\r
+ UINT8 error_code : 7;\r
+ UINT8 valid : 1;\r
+ UINT8 reserved_1;\r
+ UINT8 sense_key : 4;\r
+ UINT8 reserved_21 : 1;\r
+ UINT8 ILI : 1;\r
+ UINT8 reserved_22 : 2;\r
+ UINT8 vendor_specific_3;\r
+ UINT8 vendor_specific_4;\r
+ UINT8 vendor_specific_5;\r
+ UINT8 vendor_specific_6;\r
+ UINT8 addnl_sense_length; // n - 7\r
+ UINT8 vendor_specific_8;\r
+ UINT8 vendor_specific_9;\r
+ UINT8 vendor_specific_10;\r
+ UINT8 vendor_specific_11;\r
+ UINT8 addnl_sense_code; // mandatory\r
+ UINT8 addnl_sense_code_qualifier; // mandatory\r
+ UINT8 field_replaceable_unit_code; // optional\r
+ UINT8 reserved_15;\r
+ UINT8 reserved_16;\r
+ UINT8 reserved_17;\r
+ //\r
+ // Followed by additional sense bytes.\r
+ //\r
+} ATAPI_REQUEST_SENSE_DATA;\r
+\r
+typedef struct {\r
+ UINT8 LastLba3;\r
+ UINT8 LastLba2;\r
+ UINT8 LastLba1;\r
+ UINT8 LastLba0;\r
+ UINT8 BlockSize3;\r
+ UINT8 BlockSize2;\r
+ UINT8 BlockSize1;\r
+ UINT8 BlockSize0;\r
+} ATAPI_READ_CAPACITY_DATA;\r
+\r
+typedef struct {\r
+ UINT8 reserved_0;\r
+ UINT8 reserved_1;\r
+ UINT8 reserved_2;\r
+ UINT8 Capacity_Length;\r
+ UINT8 LastLba3;\r
+ UINT8 LastLba2;\r
+ UINT8 LastLba1;\r
+ UINT8 LastLba0;\r
+ UINT8 DesCode : 2;\r
+ UINT8 reserved_9 : 6;\r
+ UINT8 BlockSize2;\r
+ UINT8 BlockSize1;\r
+ UINT8 BlockSize0;\r
+} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
+\r
+//\r
+// ATAPI Packet Command\r
+//\r
+\r
+typedef struct {\r
+ UINT8 opcode;\r
+ UINT8 reserved_1;\r
+ UINT8 reserved_2;\r
+ UINT8 reserved_3;\r
+ UINT8 reserved_4;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 reserved_7;\r
+ UINT8 reserved_8;\r
+ UINT8 reserved_9;\r
+ UINT8 reserved_10;\r
+ UINT8 reserved_11;\r
+} ATAPI_TEST_UNIT_READY_CMD;\r
+\r
+typedef struct {\r
+ UINT8 opcode;\r
+ UINT8 reserved_1 : 4;\r
+ UINT8 lun : 4;\r
+ UINT8 page_code;\r
+ UINT8 reserved_3;\r
+ UINT8 allocation_length;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 reserved_7;\r
+ UINT8 reserved_8;\r
+ UINT8 reserved_9;\r
+ UINT8 reserved_10;\r
+ UINT8 reserved_11;\r
+} ATAPI_INQUIRY_CMD;\r
+\r
+typedef struct {\r
+ UINT8 opcode;\r
+ UINT8 reserved_1 : 4;\r
+ UINT8 lun : 4;\r
+ UINT8 reserved_2;\r
+ UINT8 reserved_3;\r
+ UINT8 allocation_length;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 reserved_7;\r
+ UINT8 reserved_8;\r
+ UINT8 reserved_9;\r
+ UINT8 reserved_10;\r
+ UINT8 reserved_11;\r
+} ATAPI_REQUEST_SENSE_CMD;\r
+\r
+typedef struct {\r
+ UINT8 opcode;\r
+ UINT8 reserved_1 : 5;\r
+ UINT8 lun : 3;\r
+ UINT8 Lba0;\r
+ UINT8 Lba1;\r
+ UINT8 Lba2;\r
+ UINT8 Lba3;\r
+ UINT8 reserved_6;\r
+ UINT8 TranLen0;\r
+ UINT8 TranLen1;\r
+ UINT8 reserved_9;\r
+ UINT8 reserved_10;\r
+ UINT8 reserved_11;\r
+} ATAPI_READ10_CMD;\r
+\r
+typedef struct {\r
+ UINT8 opcode;\r
+ UINT8 reserved_1;\r
+ UINT8 reserved_2;\r
+ UINT8 reserved_3;\r
+ UINT8 reserved_4;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 allocation_length_hi;\r
+ UINT8 allocation_length_lo;\r
+ UINT8 reserved_9;\r
+ UINT8 reserved_10;\r
+ UINT8 reserved_11;\r
+} ATAPI_READ_FORMAT_CAP_CMD;\r
+\r
+typedef struct {\r
+ UINT8 peripheral_type;\r
+ UINT8 RMB;\r
+ UINT8 version;\r
+ UINT8 response_data_format;\r
+ UINT8 addnl_length;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 reserved_7;\r
+ UINT8 vendor_info[8];\r
+ UINT8 product_id[12];\r
+ UINT8 eeprom_product_code[4];\r
+ UINT8 firmware_rev_level[4];\r
+} ATAPI_USB_INQUIRY_DATA;\r
+\r
+typedef struct {\r
+ UINT8 opcode;\r
+ UINT8 reserved_1 : 4;\r
+ UINT8 lun : 4;\r
+ UINT8 page_code : 4;\r
+ UINT8 page_control : 4;\r
+ UINT8 reserved_3;\r
+ UINT8 reserved_4;\r
+ UINT8 reserved_5;\r
+ UINT8 reserved_6;\r
+ UINT8 parameter_list_length_hi;\r
+ UINT8 parameter_list_length_lo;\r
+ UINT8 reserved_9;\r
+ UINT8 reserved_10;\r
+ UINT8 reserved_11;\r
+} ATAPI_MODE_SENSE_CMD;\r
+\r
+//\r
+// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r
+// We add it here for the convenience for ATA/ATAPI module writer. \r
+//\r
+typedef union {\r
+ UINT16 Data16[6];\r
+ ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r
+ ATAPI_READ10_CMD Read10;\r
+ ATAPI_REQUEST_SENSE_CMD RequestSence;\r
+ ATAPI_INQUIRY_CMD Inquiry;\r
+ ATAPI_MODE_SENSE_CMD ModeSense;\r
+ ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
+} ATAPI_PACKET_COMMAND;\r
+\r
+#pragma pack(pop)\r
+\r
+\r
+#define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r
+#define ATAPI_MAX_DMA_CMD_SECTORS 0x100\r
+\r
+//\r
+// ATA Packet Command Code\r
+//\r
+#define ATA_CMD_SOFT_RESET 0x08\r
+#define ATA_CMD_PACKET 0xA0\r
+#define ATA_CMD_IDENTIFY_DEVICE 0xA1\r
+#define ATA_CMD_SERVICE 0xA2\r
+#define ATA_CMD_TEST_UNIT_READY 0x00\r
+#define ATA_CMD_REQUEST_SENSE 0x03\r
+#define ATA_CMD_INQUIRY 0x12\r
+#define ATA_CMD_READ_FORMAT_CAPACITY 0x23\r
+#define ATA_CMD_READ_CAPACITY 0x25\r
+#define ATA_CMD_READ_10 0x28\r
+#define ATA_CMD_WRITE_10 0x2A\r
+\r
+//\r
+// ATA Commands Code\r
+//\r
+\r
+//\r
+// Class 1: PIO Data-In Commands\r
+//\r
+#define ATA_CMD_IDENTIFY_DRIVE 0xec\r
+#define ATA_CMD_READ_BUFFER 0xe4\r
+#define ATA_CMD_READ_SECTORS 0x20\r
+#define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21\r
+#define ATA_CMD_READ_LONG 0x22\r
+#define ATA_CMD_READ_LONG_WITH_RETRY 0x23\r
+//\r
+// Atapi6 enhanced commands\r
+//\r
+#define ATA_CMD_READ_SECTORS_EXT 0x24\r
+\r
+\r
+//\r
+// Class 2: PIO Data-Out Commands\r
+//\r
+#define ATA_CMD_FORMAT_TRACK 0x50\r
+#define ATA_CMD_WRITE_BUFFER 0xe8\r
+#define ATA_CMD_WRITE_SECTORS 0x30\r
+#define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31\r
+#define ATA_CMD_WRITE_LONG 0x32\r
+#define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33\r
+#define ATA_CMD_WRITE_VERIFY 0x3c\r
+//\r
+// Class 2 - Atapi6 enhanced commands\r
+//\r
+#define ATA_CMD_WRITE_SECTORS_EXT 0x34\r
+\r
+//\r
+// Class 3 No Data Command\r
+//\r
+#define ATA_CMD_ACK_MEDIA_CHANGE 0xdb\r
+#define ATA_CMD_BOOT_POST_BOOT 0xdc\r
+#define ATA_CMD_BOOT_PRE_BOOT 0xdd\r
+#define ATA_CMD_CHECK_POWER_MODE 0x98\r
+#define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5\r
+#define ATA_CMD_DOOR_LOCK 0xde\r
+#define ATA_CMD_DOOR_UNLOCK 0xdf\r
+#define ATA_CMD_EXEC_DRIVE_DIAG 0x90\r
+#define ATA_CMD_IDLE_ALIAS 0x97\r
+#define ATA_CMD_IDLE 0xe3\r
+#define ATA_CMD_IDLE_IMMEDIATE 0x95\r
+#define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1\r
+#define ATA_CMD_INIT_DRIVE_PARAM 0x91\r
+#define ATA_CMD_RECALIBRATE 0x10 /* aliased to 1x */\r
+#define ATA_CMD_READ_DRIVE_STATE 0xe9\r
+#define ATA_CMD_SET_MULTIPLE_MODE 0xC6\r
+#define ATA_CMD_READ_VERIFY 0x40\r
+#define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41\r
+#define ATA_CMD_SEEK 0x70 /* aliased to 7x */\r
+#define ATA_CMD_SET_FEATURES 0xef\r
+#define ATA_CMD_STANDBY 0x96\r
+#define ATA_CMD_STANDBY_ALIAS 0xe2\r
+#define ATA_CMD_STANDBY_IMMEDIATE 0x94\r
+#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0\r
+//\r
+// S.M.A.R.T\r
+//\r
+#define ATA_CMD_SMART 0xb0\r
+#define ATA_CONSTANT_C2 0xc2\r
+#define ATA_CONSTANT_4F 0x4f\r
+#define ATA_SMART_ENABLE_OPERATION 0xd8\r
+#define ATA_SMART_RETURN_STATUS 0xda\r
+\r
+\r
+//\r
+// Class 4: DMA Command\r
+//\r
+#define ATA_CMD_READ_DMA 0xc8\r
+#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9\r
+#define ATA_CMD_READ_DMA_EXT 0x25\r
+#define ATA_CMD_WRITE_DMA 0xca\r
+#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb\r
+#define ATA_CMD_WRITE_DMA_EXT 0x35\r
+\r
+\r
+\r
+//\r
+// default content of device control register, disable INT\r
+//\r
+#define ATA_DEFAULT_CTL (0x0a) // default content of device control register, disable INT\r
+#define ATA_DEFAULT_CMD (0xa0)\r
+\r
+#define ATAPI_MAX_BYTE_COUNT (0xfffe)\r
+\r
+//\r
+// Sense Key\r
+//\r
+#define ATA_REQUEST_SENSE_ERROR (0x70)\r
+#define ATA_SK_NO_SENSE (0x0)\r
+#define ATA_SK_RECOVERY_ERROR (0x1)\r
+#define ATA_SK_NOT_READY (0x2)\r
+#define ATA_SK_MEDIUM_ERROR (0x3)\r
+#define ATA_SK_HARDWARE_ERROR (0x4)\r
+#define ATA_SK_ILLEGAL_REQUEST (0x5)\r
+#define ATA_SK_UNIT_ATTENTION (0x6)\r
+#define ATA_SK_DATA_PROTECT (0x7)\r
+#define ATA_SK_BLANK_CHECK (0x8)\r
+#define ATA_SK_VENDOR_SPECIFIC (0x9)\r
+#define ATA_SK_RESERVED_A (0xA)\r
+#define ATA_SK_ABORT (0xB)\r
+#define ATA_SK_RESERVED_C (0xC)\r
+#define ATA_SK_OVERFLOW (0xD)\r
+#define ATA_SK_MISCOMPARE (0xE)\r
+#define ATA_SK_RESERVED_F (0xF)\r
+\r
+//\r
+// Additional Sense Codes\r
+//\r
+#define ATA_ASC_NOT_READY (0x04)\r
+#define ATA_ASC_MEDIA_ERR1 (0x10)\r
+#define ATA_ASC_MEDIA_ERR2 (0x11)\r
+#define ATA_ASC_MEDIA_ERR3 (0x14)\r
+#define ATA_ASC_MEDIA_ERR4 (0x30)\r
+#define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)\r
+#define ATA_ASC_INVALID_CMD (0x20)\r
+#define ATA_ASC_LBA_OUT_OF_RANGE (0x21)\r
+#define ATA_ASC_INVALID_FIELD (0x24)\r
+#define ATA_ASC_WRITE_PROTECTED (0x27)\r
+#define ATA_ASC_MEDIA_CHANGE (0x28)\r
+#define ATA_ASC_RESET (0x29) /* Power On Reset or Bus Reset occurred */\r
+#define ATA_ASC_ILLEGAL_FIELD (0x26)\r
+#define ATA_ASC_NO_MEDIA (0x3A)\r
+#define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
+\r
+//\r
+// Additional Sense Code Qualifier\r
+//\r
+#define ATA_ASCQ_IN_PROGRESS (0x01)\r
+\r
+//\r
+// Err Reg\r
+//\r
+#define ATA_ERRREG_BBK BIT7 /* Bad block detected */\r
+#define ATA_ERRREG_UNC BIT6 /* Uncorrectable Data */\r
+#define ATA_ERRREG_MC BIT5 /* Media Change */\r
+#define ATA_ERRREG_IDNF BIT4 /* ID Not Found */\r
+#define ATA_ERRREG_MCR BIT3 /* Media Change Requested */\r
+#define ATA_ERRREG_ABRT BIT2 /* Aborted Command */\r
+#define ATA_ERRREG_TK0NF BIT1 /* Track 0 Not Found */\r
+#define ATA_ERRREG_AMNF BIT0 /* Address Mark Not Found */\r
+\r
+//\r
+// Status Reg\r
+//\r
+#define ATA_STSREG_BSY BIT7 /* Controller Busy */\r
+#define ATA_STSREG_DRDY BIT6 /* Drive Ready */\r
+#define ATA_STSREG_DWF BIT5 /* Drive Write Fault */\r
+#define ATA_STSREG_DSC BIT4 /* Disk Seek Complete */\r
+#define ATA_STSREG_DRQ BIT3 /* Data Request */\r
+#define ATA_STSREG_CORR BIT2 /* Corrected Data */\r
+#define ATA_STSREG_IDX BIT1 /* Index */\r
+#define ATA_STSREG_ERR BIT0 /* Error */\r
+\r
+//\r
+// Device Control Reg\r
+//\r
+#define ATA_CTLREG_SRST BIT2 /* Software Reset */\r
+#define ATA_CTLREG_IEN_L BIT1 /* Interrupt Enable #*/\r
+\r
+#endif\r
+\r
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