--- /dev/null
+/** @file\r
+ The default version of EFI_PEI_CPU_IO_PPI support published by PeiServices in\r
+ PeiCore initialization phase.\r
+ \r
+ EFI_PEI_CPU_IO_PPI is installed by some platform or chipset-specific PEIM that\r
+ abstracts the processor-visible I/O operations. When PeiCore is started, the\r
+ default version of EFI_PEI_CPU_IO_PPI will be assigned to PeiServices table.\r
+ \r
+Copyright (c) 2009, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#include "PeiMain.h"\r
+\r
+///\r
+/// This default instance of EFI_PEI_CPU_IO_PPI install assigned to EFI_PEI_SERVICE.CpuIo\r
+/// when PeiCore's initialization.\r
+///\r
+EFI_PEI_CPU_IO_PPI gPeiDefaultCpuIoPpi = {\r
+ {\r
+ PeiDefaultMemRead,\r
+ PeiDefaultMemWrite\r
+ },\r
+ {\r
+ PeiDefaultIoRead,\r
+ PeiDefaultIoWrite\r
+ },\r
+ PeiDefaultIoRead8,\r
+ PeiDefaultIoRead16,\r
+ PeiDefaultIoRead32,\r
+ PeiDefaultIoRead64,\r
+ PeiDefaultIoWrite8,\r
+ PeiDefaultIoWrite16,\r
+ PeiDefaultIoWrite32,\r
+ PeiDefaultIoWrite64,\r
+ PeiDefaultMemRead8,\r
+ PeiDefaultMemRead16,\r
+ PeiDefaultMemRead32,\r
+ PeiDefaultMemRead64,\r
+ PeiDefaultMemWrite8,\r
+ PeiDefaultMemWrite16,\r
+ PeiDefaultMemWrite32,\r
+ PeiDefaultMemWrite64\r
+};\r
+\r
+/**\r
+ Memory-based read services.\r
+ \r
+ This function is to perform the Memory Access Read service based on installed \r
+ instance of the EFI_PEI_CPU_IO_PPI. \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed. \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultMemRead (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+}\r
+ \r
+/**\r
+ Memory-based write services.\r
+ \r
+ This function is to perform the Memory Access Write service based on installed \r
+ instance of the EFI_PEI_CPU_IO_PPI. \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed. \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultMemWrite (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+}\r
+\r
+/**\r
+ IO-based read services.\r
+ \r
+ This function is to perform the IO-base read service for the EFI_PEI_CPU_IO_PPI.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultIoRead (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+}\r
+\r
+/**\r
+ IO-based write services.\r
+ \r
+ This function is to perform the IO-base write service for the EFI_PEI_CPU_IO_PPI.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultIoWrite (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+}\r
+\r
+/**\r
+ 8-bit I/O read operations.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 8-bit value returned from the I/O space.\r
+**/\r
+UINT8\r
+EFIAPI\r
+PeiDefaultIoRead8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+}\r
+\r
+/**\r
+ Reads an 16-bit I/O port.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return A 16-bit value returned from the I/O space.\r
+**/\r
+UINT16\r
+EFIAPI\r
+PeiDefaultIoRead16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+}\r
+\r
+/**\r
+ Reads an 32-bit I/O port.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return A 32-bit value returned from the I/O space.\r
+**/\r
+UINT32\r
+EFIAPI\r
+PeiDefaultIoRead32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+}\r
+\r
+/**\r
+ Reads an 64-bit I/O port.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return A 64-bit value returned from the I/O space.\r
+**/\r
+UINT64\r
+EFIAPI\r
+PeiDefaultIoRead64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+}\r
+\r
+/**\r
+ 8-bit I/O write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT8 Data\r
+ )\r
+{\r
+} \r
+\r
+/**\r
+ 16-bit I/O write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT16 Data\r
+ )\r
+{\r
+}\r
+\r
+/**\r
+ 32-bit I/O write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT32 Data\r
+ )\r
+{\r
+}\r
+\r
+/**\r
+ 64-bit I/O write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT64 Data\r
+ )\r
+{\r
+}\r
+\r
+/**\r
+ 8-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 8-bit value returned from the memory space.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PeiDefaultMemRead8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+} \r
+\r
+/**\r
+ 16-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 16-bit value returned from the memory space.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PeiDefaultMemRead16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+} \r
+\r
+/**\r
+ 32-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 32-bit value returned from the memory space.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PeiDefaultMemRead32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+} \r
+\r
+/**\r
+ 64-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 64-bit value returned from the memory space.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+PeiDefaultMemRead64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ )\r
+{\r
+ return 0;\r
+} \r
+\r
+/**\r
+ 8-bit memory write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT8 Data\r
+ )\r
+{\r
+} \r
+\r
+/**\r
+ 16-bit memory write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT16 Data\r
+ )\r
+{\r
+} \r
+\r
+/**\r
+ 32-bit memory write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT32 Data\r
+ )\r
+{\r
+} \r
+\r
+/**\r
+ 64-bit memory write operations.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then do\r
+ nothing.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT64 Data\r
+ )\r
+{\r
+} \r
--- /dev/null
+/** @file\r
+ The default version of EFI_PEI_PCI_CFG2_PPI support published by PeiServices in\r
+ PeiCore initialization phase.\r
+ \r
+ EFI_PEI_PCI_CFG2_PPI is installed by the PEIM which supports a PCI root bridge. \r
+ When PeiCore is started, the default version of EFI_PEI_PCI_CFG2_PPI will be assigned \r
+ to PeiServices table.\r
+ \r
+Copyright (c) 2009, Intel Corporation \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#include "PeiMain.h"\r
+\r
+///\r
+/// This default instance of EFI_PEI_PCI_CFG2_PPI install assigned to EFI_PEI_SERVICE.PciCfg \r
+/// when PeiCore's initialization.\r
+///\r
+EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi = {\r
+ PeiDefaultPciCfg2Read,\r
+ PeiDefaultPciCfg2Write,\r
+ PeiDefaultPciCfg2Modify\r
+};\r
+\r
+/**\r
+ Reads from a given location in the PCI configuration space.\r
+\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
+ @param Address The physical address of the access. The format of\r
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+ \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Read (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+}\r
+\r
+/**\r
+ Write to a given location in the PCI configuration space.\r
+\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
+ @param Address The physical address of the access. The format of\r
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Write (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+} \r
+\r
+/**\r
+ This function performs a read-modify-write operation on the contents from a given\r
+ location in the PCI configuration space.\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes. Type\r
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
+ @param Address The physical address of the access.\r
+ @param SetBits Points to value to bitwise-OR with the read configuration value.\r
+ The size of the value is determined by Width.\r
+ @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
+ The size of the value is determined by Width.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Modify (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *SetBits,\r
+ IN VOID *ClearBits\r
+ )\r
+{\r
+ return EFI_NOT_AVAILABLE_YET;\r
+} \r
IN UINTN Instance\r
);\r
\r
+//\r
+// Default EFI_PEI_CPU_IO_PPI support for EFI_PEI_SERVICES table when PeiCore initialization.\r
+// \r
+\r
+/**\r
+ Memory-based read services.\r
+ \r
+ This function is to perform the Memory Access Read service based on installed \r
+ instance of the EFI_PEI_CPU_IO_PPI. \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed. \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultMemRead (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ Memory-based write services.\r
+ \r
+ This function is to perform the Memory Access Write service based on installed \r
+ instance of the EFI_PEI_CPU_IO_PPI. \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed. \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultMemWrite (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ IO-based read services.\r
+ \r
+ This function is to perform the IO-base read service for the EFI_PEI_CPU_IO_PPI.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultIoRead (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ IO-based write services.\r
+ \r
+ This function is to perform the IO-base write service for the EFI_PEI_CPU_IO_PPI.\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ @param Address The physical address of the access.\r
+ @param Count The number of accesses to perform.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultIoWrite (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN UINTN Count,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ 8-bit I/O read operations.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 8-bit value returned from the I/O space.\r
+**/\r
+UINT8\r
+EFIAPI\r
+PeiDefaultIoRead8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ Reads an 16-bit I/O port.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return A 16-bit value returned from the I/O space.\r
+**/\r
+UINT16\r
+EFIAPI\r
+PeiDefaultIoRead16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ Reads an 32-bit I/O port.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return A 32-bit value returned from the I/O space.\r
+**/\r
+UINT32\r
+EFIAPI\r
+PeiDefaultIoRead32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ Reads an 64-bit I/O port.\r
+ \r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return A 64-bit value returned from the I/O space.\r
+**/\r
+UINT64\r
+EFIAPI\r
+PeiDefaultIoRead64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ 8-bit I/O write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT8 Data\r
+ );\r
+ \r
+/**\r
+ 16-bit I/O write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT16 Data\r
+ );\r
+ \r
+/**\r
+ 32-bit I/O write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT32 Data\r
+ );\r
+ \r
+/**\r
+ 64-bit I/O write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultIoWrite64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT64 Data\r
+ );\r
+ \r
+/**\r
+ 8-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 8-bit value returned from the memory space.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PeiDefaultMemRead8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ 16-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 16-bit value returned from the memory space.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PeiDefaultMemRead16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ 32-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 32-bit value returned from the memory space.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PeiDefaultMemRead32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ 64-bit memory read operations.\r
+\r
+ If the EFI_PEI_CPU_IO_PPI is not installed by platform/chipset PEIM, then \r
+ return 0.\r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+\r
+ @return An 64-bit value returned from the memory space.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+PeiDefaultMemRead64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address\r
+ );\r
+ \r
+/**\r
+ 8-bit memory write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite8 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT8 Data\r
+ );\r
+ \r
+/**\r
+ 16-bit memory write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite16 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT16 Data\r
+ );\r
+\r
+/**\r
+ 32-bit memory write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite32 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT32 Data\r
+ );\r
+ \r
+/**\r
+ 64-bit memory write operations.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Address The physical address of the access.\r
+ @param Data The data to write.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PeiDefaultMemWrite64 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_CPU_IO_PPI *This,\r
+ IN UINT64 Address,\r
+ IN UINT64 Data\r
+ );\r
+ \r
+extern EFI_PEI_CPU_IO_PPI gPeiDefaultCpuIoPpi; \r
+\r
+//\r
+// Default EFI_PEI_PCI_CFG2_PPI support for EFI_PEI_SERVICES table when PeiCore initialization.\r
+// \r
+\r
+/**\r
+ Reads from a given location in the PCI configuration space.\r
+\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
+ @param Address The physical address of the access. The format of\r
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+ \r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Read (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ Write to a given location in the PCI configuration space.\r
+\r
+ If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then \r
+ return EFI_NOT_YET_AVAILABLE. \r
+ \r
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes.\r
+ See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
+ @param Address The physical address of the access. The format of\r
+ the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
+ @param Buffer A pointer to the buffer of data.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Write (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN OUT VOID *Buffer\r
+ );\r
+ \r
+/**\r
+ This function performs a read-modify-write operation on the contents from a given\r
+ location in the PCI configuration space.\r
+\r
+ @param PeiServices An indirect pointer to the PEI Services Table\r
+ published by the PEI Foundation.\r
+ @param This Pointer to local data for the interface.\r
+ @param Width The width of the access. Enumerated in bytes. Type\r
+ EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
+ @param Address The physical address of the access.\r
+ @param SetBits Points to value to bitwise-OR with the read configuration value.\r
+ The size of the value is determined by Width.\r
+ @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
+ The size of the value is determined by Width.\r
+\r
+ @retval EFI_SUCCESS The function completed successfully.\r
+ @retval EFI_INVALID_PARAMETER The invalid access width.\r
+ @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PeiDefaultPciCfg2Modify (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
+ IN UINT64 Address,\r
+ IN VOID *SetBits,\r
+ IN VOID *ClearBits\r
+ ); \r
+ \r
+extern EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi;\r
+\r
/**\r
After PeiCore image is shadowed into permanent memory, all build-in FvPpi should\r
be re-installed with the instance in permanent memory and all cached FvPpi pointers in \r
Dependency/Dependency.c\r
Dependency/Dependency.h\r
BootMode/BootMode.c\r
+ CpuIo/CpuIo.c\r
+ PciCfg2/PciCfg2.c\r
PeiMain.h\r
\r
[Packages]\r
gEfiPeiLoadFilePpiGuid ## PRODUCES ## SOMETIMES_CONSUMES (The default load PeImage logic will be used when this PPI doesn't exist)\r
gEfiPeiSecurity2PpiGuid ## NOTIFY\r
gEfiTemporaryRamSupportPpiGuid ## CONSUMES\r
-\r
+ gEfiPeiCpuIoPpiInstalledGuid ## PRODUCES ## PRODUCES\r
+ gEfiPciCfg2PpiGuid ## PRODUCES ## PRODUCES\r
+ \r
[FixedPcd.common]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported ## CONSUMES\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv ## CONSUMES\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPpiSupported ## CONSUMES\r
- gEfiMdePkgTokenSpaceGuid.PcdStatusCodeValuePeimDispatch ## CONSUMES\r
+ gEfiMdePkgTokenSpaceGuid.PcdStatusCodeValuePeimDispatch ## CONSUMES\r
gEfiMdePkgTokenSpaceGuid.PcdStatusCodeValuePeiCoreEntry ## CONSUMES\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize ## CONSUMES\r
\r
[FeaturePcd.common]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst ## CONSUMES\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdFrameworkCompatibilitySupport ## CONSUMES\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFrameworkCompatibilitySupport ## CONSUMES\r
\ No newline at end of file
PeiReportStatusCode,\r
PeiResetSystem,\r
\r
- NULL,\r
- NULL,\r
+ &gPeiDefaultCpuIoPpi,\r
+ &gPeiDefaultPciCfg2Ppi,\r
\r
PeiFfsFindFileByName,\r
PeiFfsGetFileInfo,\r
projects / mirror_edk2.git / commitdiff