SMM emulation under both KVM and QEMU (TCG) crashes the guest when the
"jz" branch, added in commit
d4d87596c11d ("UefiCpuPkg/PiSmmCpuDxeSmm:
Enable NXE if it's supported", 2018-01-18), is taken.
Rework the propagation of CPUID.80000001H:EDX.NX [bit 20] to IA32_EFER.NXE
[bit 11] so that no code is executed conditionally.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Ref: http://mid.mail-archive.com/
d6fff558-6c4f-9ca6-74a7-
e7cd9d007276@redhat.com
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
[lersek@redhat.com: XD -> NX code comment updates from Ray]
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
[lersek@redhat.com: mark QEMU/TCG as well in the commit message]
mov eax, 0x80000001 ; read capability\r
cpuid\r
mov ebx, edx ; rdmsr will change edx. keep it in ebx.\r
+ and ebx, BIT20 ; extract NX capability bit\r
+ shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position\r
DB 0x66, 0xb8 ; mov eax, imm32\r
ASM_PFX(gSmmCr3): DD 0\r
mov cr3, eax\r
mov cr4, eax\r
mov ecx, 0xc0000080 ; IA32_EFER MSR\r
rdmsr\r
- test ebx, BIT20 ; check NXE capability\r
- jz .1\r
- or ah, BIT3 ; set NXE bit\r
+ or eax, ebx ; set NXE bit if NX is available\r
wrmsr\r
-.1:\r
DB 0x66, 0xb8 ; mov eax, imm32\r
ASM_PFX(gSmmCr0): DD 0\r
mov di, PROTECT_MODE_DS\r