IN UINT64 Adjust\r
);\r
\r
-RETURN_STATUS\r
-PeCoffLoaderRelocateIpfImage (\r
- IN UINT16 *Reloc,\r
- IN OUT CHAR8 *Fixup,\r
- IN OUT CHAR8 **FixupData,\r
- IN UINT64 Adjust\r
- );\r
\r
RETURN_STATUS\r
PeCoffLoaderRelocateArmImage (\r
}\r
\r
if (ImageContext->Machine != EFI_IMAGE_MACHINE_IA32 && \\r
- ImageContext->Machine != EFI_IMAGE_MACHINE_IA64 && \\r
ImageContext->Machine != EFI_IMAGE_MACHINE_X64 && \\r
ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \\r
ImageContext->Machine != EFI_IMAGE_MACHINE_EBC && \\r
case EFI_IMAGE_MACHINE_ARMT:\r
Status = PeCoffLoaderRelocateArmImage (&Reloc, Fixup, &FixupData, Adjust);\r
break;\r
- case EFI_IMAGE_MACHINE_IA64:\r
- Status = PeCoffLoaderRelocateIpfImage (Reloc, Fixup, &FixupData, Adjust);\r
- break;\r
default:\r
Status = RETURN_UNSUPPORTED;\r
break;\r
Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;\r
break;\r
case EFI_IMAGE_MACHINE_X64:\r
- case EFI_IMAGE_MACHINE_IPF:\r
//\r
- // Assume PE32+ image with X64 or IPF Machine field\r
+ // Assume PE32+ image with X64 Machine field\r
//\r
Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
break;\r
/** @file\r
-IA32, X64 and IPF Specific relocation fixups\r
+IA32 and X64 Specific relocation fixups\r
\r
Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
return RETURN_UNSUPPORTED;\r
}\r
\r
-RETURN_STATUS\r
-PeCoffLoaderRelocateIpfImage (\r
- IN UINT16 *Reloc,\r
- IN OUT CHAR8 *Fixup,\r
- IN OUT CHAR8 **FixupData,\r
- IN UINT64 Adjust\r
- )\r
-/*++\r
-\r
-Routine Description:\r
-\r
- Performs an Itanium-based specific relocation fixup\r
-\r
-Arguments:\r
-\r
- Reloc - Pointer to the relocation record\r
-\r
- Fixup - Pointer to the address to fix up\r
-\r
- FixupData - Pointer to a buffer to log the fixups\r
-\r
- Adjust - The offset to adjust the fixup\r
-\r
-Returns:\r
-\r
- Status code\r
-\r
---*/\r
-{\r
- UINT64 *F64;\r
- UINT64 FixupVal;\r
-\r
- switch ((*Reloc) >> 12) {\r
-\r
- case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
-\r
- //\r
- // Align it to bundle address before fixing up the\r
- // 64-bit immediate value of the movl instruction.\r
- //\r
-\r
- Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r
- FixupVal = (UINT64)0;\r
-\r
- //\r
- // Extract the lower 32 bits of IMM64 from bundle\r
- //\r
- EXT_IMM64(FixupVal,\r
- (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,\r
- IMM64_IMM7B_SIZE_X,\r
- IMM64_IMM7B_INST_WORD_POS_X,\r
- IMM64_IMM7B_VAL_POS_X\r
- );\r
-\r
- EXT_IMM64(FixupVal,\r
- (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,\r
- IMM64_IMM9D_SIZE_X,\r
- IMM64_IMM9D_INST_WORD_POS_X,\r
- IMM64_IMM9D_VAL_POS_X\r
- );\r
-\r
- EXT_IMM64(FixupVal,\r
- (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,\r
- IMM64_IMM5C_SIZE_X,\r
- IMM64_IMM5C_INST_WORD_POS_X,\r
- IMM64_IMM5C_VAL_POS_X\r
- );\r
-\r
- EXT_IMM64(FixupVal,\r
- (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,\r
- IMM64_IC_SIZE_X,\r
- IMM64_IC_INST_WORD_POS_X,\r
- IMM64_IC_VAL_POS_X\r
- );\r
-\r
- EXT_IMM64(FixupVal,\r
- (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,\r
- IMM64_IMM41a_SIZE_X,\r
- IMM64_IMM41a_INST_WORD_POS_X,\r
- IMM64_IMM41a_VAL_POS_X\r
- );\r
-\r
- //\r
- // Update 64-bit address\r
- //\r
- FixupVal += Adjust;\r
-\r
- //\r
- // Insert IMM64 into bundle\r
- //\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),\r
- IMM64_IMM7B_SIZE_X,\r
- IMM64_IMM7B_INST_WORD_POS_X,\r
- IMM64_IMM7B_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),\r
- IMM64_IMM9D_SIZE_X,\r
- IMM64_IMM9D_INST_WORD_POS_X,\r
- IMM64_IMM9D_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),\r
- IMM64_IMM5C_SIZE_X,\r
- IMM64_IMM5C_INST_WORD_POS_X,\r
- IMM64_IMM5C_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),\r
- IMM64_IC_SIZE_X,\r
- IMM64_IC_INST_WORD_POS_X,\r
- IMM64_IC_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),\r
- IMM64_IMM41a_SIZE_X,\r
- IMM64_IMM41a_INST_WORD_POS_X,\r
- IMM64_IMM41a_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),\r
- IMM64_IMM41b_SIZE_X,\r
- IMM64_IMM41b_INST_WORD_POS_X,\r
- IMM64_IMM41b_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),\r
- IMM64_IMM41c_SIZE_X,\r
- IMM64_IMM41c_INST_WORD_POS_X,\r
- IMM64_IMM41c_VAL_POS_X\r
- );\r
-\r
- INS_IMM64(FixupVal,\r
- ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),\r
- IMM64_SIGN_SIZE_X,\r
- IMM64_SIGN_INST_WORD_POS_X,\r
- IMM64_SIGN_VAL_POS_X\r
- );\r
-\r
- F64 = (UINT64 *) Fixup;\r
- if (*FixupData != NULL) {\r
- *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));\r
- *(UINT64 *)(*FixupData) = *F64;\r
- *FixupData = *FixupData + sizeof(UINT64);\r
- }\r
- break;\r
-\r
- default:\r
- return RETURN_UNSUPPORTED;\r
- }\r
-\r
- return RETURN_SUCCESS;\r
-}\r
\r
/**\r
Pass in a pointer to an ARM MOVT or MOVW immediate instruciton and\r
//\r
static STRING_LOOKUP mMachineTypes[] = {\r
{ EFI_IMAGE_MACHINE_IA32, "IA32" },\r
- { EFI_IMAGE_MACHINE_IA64, "IA64" },\r
- { EFI_IMAGE_MACHINE_EBC, "EBC" },\r
{ EFI_IMAGE_MACHINE_X64, "X64" },\r
+ { EFI_IMAGE_MACHINE_EBC, "EBC" },\r
{ EFI_IMAGE_MACHINE_ARMT, "ARM" },\r
{ EFI_IMAGE_MACHINE_AARCH64, "AA64" },\r
{ 0, NULL }\r
fprintf (FvMapFile, "BaseAddress=0x%010llx, ", (unsigned long long) (ImageBaseAddress + Offset));\r
}\r
\r
- if (FfsFile->Type != EFI_FV_FILETYPE_SECURITY_CORE && pImageContext->Machine == EFI_IMAGE_MACHINE_IA64) {\r
- //\r
- // Process IPF PLABEL to get the real address after the image has been rebased.\r
- // PLABEL structure is got by AddressOfEntryPoint offset to ImageBuffer stored in pImageContext->Handle.\r
- //\r
- fprintf (FvMapFile, "EntryPoint=0x%010llx", (unsigned long long) (*(UINT64 *)((UINTN) pImageContext->Handle + (UINTN) AddressOfEntryPoint)));\r
- } else {\r
- fprintf (FvMapFile, "EntryPoint=0x%010llx", (unsigned long long) (ImageBaseAddress + AddressOfEntryPoint));\r
- }\r
+ fprintf (FvMapFile, "EntryPoint=0x%010llx", (unsigned long long) (ImageBaseAddress + AddressOfEntryPoint));\r
fprintf (FvMapFile, ")\n");\r
\r
fprintf (FvMapFile, "(GUID=%s", FileGuidName);\r
UINT16 MachineType;\r
EFI_PHYSICAL_ADDRESS PeiCorePhysicalAddress;\r
EFI_PHYSICAL_ADDRESS SecCorePhysicalAddress;\r
- EFI_PHYSICAL_ADDRESS *SecCoreEntryAddressPtr;\r
INT32 Ia32SecEntryOffset;\r
UINT32 *Ia32ResetAddressPtr;\r
UINT8 *BytePointer;\r
UINT32 IpiVector;\r
UINTN Index;\r
EFI_FFS_FILE_STATE SavedState;\r
- UINT64 FitAddress;\r
- FIT_TABLE *FitTablePtr;\r
BOOLEAN Vtf0Detected;\r
UINT32 FfsHeaderSize;\r
UINT32 SecHeaderSize;\r
DebugMsg (NULL, 0, 9, "PeiCore physical entry point address", "Address = 0x%llX", (unsigned long long) PeiCorePhysicalAddress);\r
}\r
\r
- if (MachineType == EFI_IMAGE_MACHINE_IA64) {\r
- //\r
- // Update PEI_CORE address\r
- //\r
- //\r
- // Set the uncached attribute bit in the physical address\r
- //\r
- PeiCorePhysicalAddress |= 0x8000000000000000ULL;\r
-\r
- //\r
- // Check if address is aligned on a 16 byte boundary\r
- //\r
- if (PeiCorePhysicalAddress & 0xF) {\r
- Error (NULL, 0, 3000, "Invalid",\r
- "PEI_CORE entry point is not aligned on a 16 byte boundary, address specified is %llXh.",\r
- (unsigned long long) PeiCorePhysicalAddress\r
- );\r
- return EFI_ABORTED;\r
- }\r
- //\r
- // First Get the FIT table address\r
- //\r
- FitAddress = (*(UINT64 *) (FvImage->Eof - IPF_FIT_ADDRESS_OFFSET)) & 0xFFFFFFFF;\r
-\r
- FitTablePtr = (FIT_TABLE *) (FvImage->FileImage + (FitAddress - FvInfo->BaseAddress));\r
-\r
- Status = UpdatePeiCoreEntryInFit (FitTablePtr, PeiCorePhysicalAddress);\r
-\r
- if (!EFI_ERROR (Status)) {\r
- UpdateFitCheckSum (FitTablePtr);\r
- }\r
-\r
- //\r
- // Update SEC_CORE address\r
- //\r
- //\r
- // Set the uncached attribute bit in the physical address\r
- //\r
- SecCorePhysicalAddress |= 0x8000000000000000ULL;\r
- //\r
- // Check if address is aligned on a 16 byte boundary\r
- //\r
- if (SecCorePhysicalAddress & 0xF) {\r
- Error (NULL, 0, 3000, "Invalid",\r
- "SALE_ENTRY entry point is not aligned on a 16 byte boundary, address specified is %llXh.",\r
- (unsigned long long) SecCorePhysicalAddress\r
- );\r
- return EFI_ABORTED;\r
- }\r
- //\r
- // Update the address\r
- //\r
- SecCoreEntryAddressPtr = (EFI_PHYSICAL_ADDRESS *) ((UINTN) FvImage->Eof - IPF_SALE_ENTRY_ADDRESS_OFFSET);\r
- *SecCoreEntryAddressPtr = SecCorePhysicalAddress;\r
-\r
- } else if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X64) {\r
+if (MachineType == EFI_IMAGE_MACHINE_IA32 || MachineType == EFI_IMAGE_MACHINE_X64) {\r
if (PeiCorePhysicalAddress != 0) {\r
//\r
// Get the location to update\r
//\r
// Verify machine type is supported\r
//\r
- if ((*MachineType != EFI_IMAGE_MACHINE_IA32) && (*MachineType != EFI_IMAGE_MACHINE_IA64) && (*MachineType != EFI_IMAGE_MACHINE_X64) && (*MachineType != EFI_IMAGE_MACHINE_EBC) &&\r
+ if ((*MachineType != EFI_IMAGE_MACHINE_IA32) && (*MachineType != EFI_IMAGE_MACHINE_X64) && (*MachineType != EFI_IMAGE_MACHINE_EBC) &&\r
(*MachineType != EFI_IMAGE_MACHINE_ARMT) && (*MachineType != EFI_IMAGE_MACHINE_AARCH64)) {\r
Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the PE32 file.");\r
return EFI_UNSUPPORTED;\r
//\r
#define IA32_SEC_CORE_ENTRY_OFFSET 0xD\r
\r
-//\r
-// Defines to calculate the FIT table\r
-//\r
-#define IPF_FIT_ADDRESS_OFFSET 0x20\r
-\r
-//\r
-// Defines to calculate the offset for SALE_ENTRY\r
-//\r
-#define IPF_SALE_ENTRY_ADDRESS_OFFSET 0x18\r
-\r
//\r
// Symbol file definitions, current max size if 512K\r
//\r
mNtHdrOffset = mCoffOffset;\r
switch (mEhdr->e_machine) {\r
case EM_X86_64:\r
- case EM_IA_64:\r
case EM_AARCH64:\r
mCoffOffset += sizeof (EFI_IMAGE_NT_HEADERS64);\r
break;\r
NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_X64;\r
NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
break;\r
- case EM_IA_64:\r
- NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_IPF;\r
- NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
- break;\r
case EM_AARCH64:\r
NtHdr->Pe32Plus.FileHeader.Machine = EFI_IMAGE_MACHINE_AARCH64;\r
NtHdr->Pe32Plus.OptionalHeader.Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
//\r
// Update Image Base Address\r
//\r
- if ((ImgHdr->Pe32.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) && (ImgHdr->Pe32.FileHeader.Machine != IMAGE_FILE_MACHINE_IA64)) {\r
+ if ((ImgHdr->Pe32.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC)) {\r
ImgHdr->Pe32.OptionalHeader.ImageBase = (UINT32) NewPe32BaseAddress;\r
} else if (ImgHdr->Pe32Plus.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) {\r
ImgHdr->Pe32Plus.OptionalHeader.ImageBase = NewPe32BaseAddress;\r
// Set new base address into image\r
//\r
if (mOutImageType == FW_REBASE_IMAGE || mOutImageType == FW_SET_ADDRESS_IMAGE) {\r
- if ((PeHdr->Pe32.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) && (PeHdr->Pe32.FileHeader.Machine != IMAGE_FILE_MACHINE_IA64)) {\r
+ if ((PeHdr->Pe32.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC)) {\r
if (NewBaseAddress >= 0x100000000ULL) {\r
Error (NULL, 0, 3000, "Invalid", "New base address is larger than 4G for 32bit PE image");\r
goto Finish;\r
// Zero the .pdata section for X64 machine and don't check the Debug Directory is empty\r
// For Itaninum and X64 Image, remove .pdata section.\r
//\r
- if ((!KeepExceptionTableFlag && PeHdr->Pe32.FileHeader.Machine == IMAGE_FILE_MACHINE_X64) || PeHdr->Pe32.FileHeader.Machine == IMAGE_FILE_MACHINE_IA64) {\r
+ if ((!KeepExceptionTableFlag && PeHdr->Pe32.FileHeader.Machine == IMAGE_FILE_MACHINE_X64)) {\r
if (Optional64->NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION &&\r
Optional64->DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION].VirtualAddress != 0 &&\r
Optional64->DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION].Size != 0) {\r
#define EM_H8_300H 47 /* Hitachi H8/300H. */\r
#define EM_H8S 48 /* Hitachi H8S. */\r
#define EM_H8_500 49 /* Hitachi H8/500. */\r
-#define EM_IA_64 50 /* Intel IA-64 Processor. */\r
#define EM_MIPS_X 51 /* Stanford MIPS-X. */\r
#define EM_COLDFIRE 52 /* Motorola ColdFire. */\r
#define EM_68HC12 53 /* Motorola M68HC12. */\r
#define R_ARM_RPC24 254\r
#define R_ARM_RBASE 255\r
\r
-\r
-\r
-/* Name Value Field Calculation */\r
-#define R_IA_64_NONE 0 /* None */\r
-#define R_IA_64_IMM14 0x21 /* immediate14 S + A */\r
-#define R_IA_64_IMM22 0x22 /* immediate22 S + A */\r
-#define R_IA_64_IMM64 0x23 /* immediate64 S + A */\r
-#define R_IA_64_DIR32MSB 0x24 /* word32 MSB S + A */\r
-#define R_IA_64_DIR32LSB 0x25 /* word32 LSB S + A */\r
-#define R_IA_64_DIR64MSB 0x26 /* word64 MSB S + A */\r
-#define R_IA_64_DIR64LSB 0x27 /* word64 LSB S + A */\r
-#define R_IA_64_GPREL22 0x2a /* immediate22 @gprel(S + A) */\r
-#define R_IA_64_GPREL64I 0x2b /* immediate64 @gprel(S + A) */\r
-#define R_IA_64_GPREL32MSB 0x2c /* word32 MSB @gprel(S + A) */\r
-#define R_IA_64_GPREL32LSB 0x2d /* word32 LSB @gprel(S + A) */\r
-#define R_IA_64_GPREL64MSB 0x2e /* word64 MSB @gprel(S + A) */\r
-#define R_IA_64_GPREL64LSB 0x2f /* word64 LSB @gprel(S + A) */\r
-#define R_IA_64_LTOFF22 0x32 /* immediate22 @ltoff(S + A) */\r
-#define R_IA_64_LTOFF64I 0x33 /* immediate64 @ltoff(S + A) */\r
-#define R_IA_64_PLTOFF22 0x3a /* immediate22 @pltoff(S + A) */\r
-#define R_IA_64_PLTOFF64I 0x3b /* immediate64 @pltoff(S + A) */\r
-#define R_IA_64_PLTOFF64MSB 0x3e /* word64 MSB @pltoff(S + A) */\r
-#define R_IA_64_PLTOFF64LSB 0x3f /* word64 LSB @pltoff(S + A) */\r
-#define R_IA_64_FPTR64I 0x43 /* immediate64 @fptr(S + A) */\r
-#define R_IA_64_FPTR32MSB 0x44 /* word32 MSB @fptr(S + A) */\r
-#define R_IA_64_FPTR32LSB 0x45 /* word32 LSB @fptr(S + A) */\r
-#define R_IA_64_FPTR64MSB 0x46 /* word64 MSB @fptr(S + A) */\r
-#define R_IA_64_FPTR64LSB 0x47 /* word64 LSB @fptr(S + A) */\r
-#define R_IA_64_PCREL60B 0x48 /* immediate60 form1 S + A - P */\r
-#define R_IA_64_PCREL21B 0x49 /* immediate21 form1 S + A - P */\r
-#define R_IA_64_PCREL21M 0x4a /* immediate21 form2 S + A - P */\r
-#define R_IA_64_PCREL21F 0x4b /* immediate21 form3 S + A - P */\r
-#define R_IA_64_PCREL32MSB 0x4c /* word32 MSB S + A - P */\r
-#define R_IA_64_PCREL32LSB 0x4d /* word32 LSB S + A - P */\r
-#define R_IA_64_PCREL64MSB 0x4e /* word64 MSB S + A - P */\r
-#define R_IA_64_PCREL64LSB 0x4f /* word64 LSB S + A - P */\r
-#define R_IA_64_LTOFF_FPTR22 0x52 /* immediate22 @ltoff(@fptr(S + A)) */\r
-#define R_IA_64_LTOFF_FPTR64I 0x53 /* immediate64 @ltoff(@fptr(S + A)) */\r
-#define R_IA_64_LTOFF_FPTR32MSB 0x54 /* word32 MSB @ltoff(@fptr(S + A)) */\r
-#define R_IA_64_LTOFF_FPTR32LSB 0x55 /* word32 LSB @ltoff(@fptr(S + A)) */\r
-#define R_IA_64_LTOFF_FPTR64MSB 0x56 /* word64 MSB @ltoff(@fptr(S + A)) */\r
-#define R_IA_64_LTOFF_FPTR64LSB 0x57 /* word64 LSB @ltoff(@fptr(S + A)) */\r
-#define R_IA_64_SEGREL32MSB 0x5c /* word32 MSB @segrel(S + A) */\r
-#define R_IA_64_SEGREL32LSB 0x5d /* word32 LSB @segrel(S + A) */\r
-#define R_IA_64_SEGREL64MSB 0x5e /* word64 MSB @segrel(S + A) */\r
-#define R_IA_64_SEGREL64LSB 0x5f /* word64 LSB @segrel(S + A) */\r
-#define R_IA_64_SECREL32MSB 0x64 /* word32 MSB @secrel(S + A) */\r
-#define R_IA_64_SECREL32LSB 0x65 /* word32 LSB @secrel(S + A) */\r
-#define R_IA_64_SECREL64MSB 0x66 /* word64 MSB @secrel(S + A) */\r
-#define R_IA_64_SECREL64LSB 0x67 /* word64 LSB @secrel(S + A) */\r
-#define R_IA_64_REL32MSB 0x6c /* word32 MSB BD + A */\r
-#define R_IA_64_REL32LSB 0x6d /* word32 LSB BD + A */\r
-#define R_IA_64_REL64MSB 0x6e /* word64 MSB BD + A */\r
-#define R_IA_64_REL64LSB 0x6f /* word64 LSB BD + A */\r
-#define R_IA_64_LTV32MSB 0x74 /* word32 MSB S + A */\r
-#define R_IA_64_LTV32LSB 0x75 /* word32 LSB S + A */\r
-#define R_IA_64_LTV64MSB 0x76 /* word64 MSB S + A */\r
-#define R_IA_64_LTV64LSB 0x77 /* word64 LSB S + A */\r
-#define R_IA_64_PCREL21BI 0x79 /* immediate21 form1 S + A - P */\r
-#define R_IA_64_PCREL22 0x7a /* immediate22 S + A - P */\r
-#define R_IA_64_PCREL64I 0x7b /* immediate64 S + A - P */\r
-#define R_IA_64_IPLTMSB 0x80 /* function descriptor MSB special */\r
-#define R_IA_64_IPLTLSB 0x81 /* function descriptor LSB speciaal */\r
-#define R_IA_64_SUB 0x85 /* immediate64 A - S */\r
-#define R_IA_64_LTOFF22X 0x86 /* immediate22 special */\r
-#define R_IA_64_LDXMOV 0x87 /* immediate22 special */\r
-#define R_IA_64_TPREL14 0x91 /* imm14 @tprel(S + A) */\r
-#define R_IA_64_TPREL22 0x92 /* imm22 @tprel(S + A) */\r
-#define R_IA_64_TPREL64I 0x93 /* imm64 @tprel(S + A) */\r
-#define R_IA_64_TPREL64MSB 0x96 /* word64 MSB @tprel(S + A) */\r
-#define R_IA_64_TPREL64LSB 0x97 /* word64 LSB @tprel(S + A) */\r
-#define R_IA_64_LTOFF_TPREL22 0x9a /* imm22 @ltoff(@tprel(S+A)) */\r
-#define R_IA_64_DTPMOD64MSB 0xa6 /* word64 MSB @dtpmod(S + A) */\r
-#define R_IA_64_DTPMOD64LSB 0xa7 /* word64 LSB @dtpmod(S + A) */\r
-#define R_IA_64_LTOFF_DTPMOD22 0xaa /* imm22 @ltoff(@dtpmod(S+A)) */\r
-#define R_IA_64_DTPREL14 0xb1 /* imm14 @dtprel(S + A) */\r
-#define R_IA_64_DTPREL22 0xb2 /* imm22 @dtprel(S + A) */\r
-#define R_IA_64_DTPREL64I 0xb3 /* imm64 @dtprel(S + A) */\r
-#define R_IA_64_DTPREL32MSB 0xb4 /* word32 MSB @dtprel(S + A) */\r
-#define R_IA_64_DTPREL32LSB 0xb5 /* word32 LSB @dtprel(S + A) */\r
-#define R_IA_64_DTPREL64MSB 0xb6 /* word64 MSB @dtprel(S + A) */\r
-#define R_IA_64_DTPREL64LSB 0xb7 /* word64 LSB @dtprel(S + A) */\r
-#define R_IA_64_LTOFF_DTPREL22 0xba /* imm22 @ltoff(@dtprel(S+A)) */\r
-\r
#define R_PPC_NONE 0 /* No relocation. */\r
#define R_PPC_ADDR32 1\r
#define R_PPC_ADDR24 2\r
// PE32+ Machine type for EFI images\r
//\r
#define IMAGE_FILE_MACHINE_I386 0x014c\r
-#define IMAGE_FILE_MACHINE_IA64 0x0200\r
#define IMAGE_FILE_MACHINE_EBC 0x0EBC\r
#define IMAGE_FILE_MACHINE_X64 0x8664\r
#define IMAGE_FILE_MACHINE_ARM 0x01c0 // Thumb only\r
// Support old names for backward compatible\r
//\r
#define EFI_IMAGE_MACHINE_IA32 IMAGE_FILE_MACHINE_I386\r
-#define EFI_IMAGE_MACHINE_IA64 IMAGE_FILE_MACHINE_IA64\r
-#define EFI_IMAGE_MACHINE_IPF IMAGE_FILE_MACHINE_IA64\r
#define EFI_IMAGE_MACHINE_EBC IMAGE_FILE_MACHINE_EBC\r
#define EFI_IMAGE_MACHINE_X64 IMAGE_FILE_MACHINE_X64\r
#define EFI_IMAGE_MACHINE_ARMT IMAGE_FILE_MACHINE_ARMT\r
# The makefile can be invoked with\r
# HOST_ARCH = x86_64 or x64 for EM64T build\r
# HOST_ARCH = ia32 or IA32 for IA32 build\r
-# HOST_ARCH = ia64 or IA64 for IA64 build\r
# HOST_ARCH = Arm or ARM for ARM build\r
#\r
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// Update Image Base Address\r
//\r
- if ((ImgHdr->Pe32.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) && (ImgHdr->Pe32.FileHeader.Machine != IMAGE_FILE_MACHINE_IA64)) {\r
+ if ((ImgHdr->Pe32.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC)) {\r
ImgHdr->Pe32.OptionalHeader.ImageBase = (UINT32) NewPe32BaseAddress;\r
} else if (ImgHdr->Pe32Plus.OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) {\r
ImgHdr->Pe32Plus.OptionalHeader.ImageBase = NewPe32BaseAddress;\r
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