This function is responsible to handle all the specific platform code that must
be run in secure world to initialize some controllers.
ArmPlatformPkg/Sec: Move the L2x0 initialization to ArmPlatformLib
The L2x0 controller must be initialized in secure world. Move its initialization
into the ArmPlatformInitialize() of the Cortex A9x4 Core Tile PlatformLib.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11476
6f19259b-4bc3-4df7-8a09-
765794883524
MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE
}
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+VOID
+ArmPlatformInitialize (
+ VOID
+ ) {
+ // Do nothing yet
+}
+
/**
Initialize the system (or sometimes called permanent) memory
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ # ARM PL310 L2 Cache Driver
+ L2X0CacheLib|ArmPkg/Drivers/PL310L2Cache/PL310L2CacheSec.inf
# ARM PL341 DMC Driver
PL341DmcLib|ArmPkg/Drivers/PL34xDmc/PL341Dmc.inf
# ARM PL301 Axi Driver
# ARM PL354 SMC Driver
PL354SmcSecLib|ArmPkg/Drivers/PL35xSmc/PL354SmcSec.inf
- # ARM PL310 L2 Cache Driver
- L2X0CacheLib|ArmPkg/Drivers/PL310L2Cache/PL310L2CacheSec.inf
# ARM PL390 General Interrupt Driver in Secure and Non-secure
PL390GicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSec.inf
PL390GicNonSecLib|ArmPkg/Drivers/PL390Gic/PL390GicNonSec.inf
MemoryAllocationLib
PL341DmcLib
PL301AxiLib
+ L2X0CacheLib
[Sources.common]
CTA9x4.c
[FixedPcd]
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize
+
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase
PL354SmcSecLib\r
PL341DmcLib\r
PL301AxiLib\r
+ L2X0CacheLib\r
\r
[Sources.common]\r
CTA9x4.c\r
[FixedPcd]\r
gArmTokenSpaceGuid.PcdNormalFdBaseAddress\r
gArmTokenSpaceGuid.PcdNormalFdSize\r
+\r
+ gArmTokenSpaceGuid.PcdL2x0ControllerBase\r
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Drivers/PL341Dmc.h>
+#include <Drivers/PL301Axi.h>
+#include <Library/L2X0CacheLib.h>
#include <Library/SerialPortLib.h>
#define SerialPrint(txt) SerialPortWrite (txt, AsciiStrLen(txt)+1);
MmioWrite32(ARM_VE_SYS_CFGRW1_REG, (val32 & 0x0FFFFFFF) | ARM_VE_CFGRW1_REMAP_DRAM);
}
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+VOID
+ArmPlatformInitialize (
+ VOID
+ ) {
+ // The L2x0 controller must be intialize in Secure World
+ L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase), FALSE);
+}
+
/**
Initialize the system (or sometimes called permanent) memory
**/
VOID ArmPlatformInitializeBootMemory(VOID);
+/**
+ Initialize controllers that must setup at the early stage
+
+ Some peripherals must be initialized in Secure World.
+ For example, some L2x0 requires to be initialized in Secure World
+
+**/
+VOID
+ArmPlatformInitialize (
+ VOID
+ );
+
/**
Initialize the system (or sometimes called permanent) memory
#include <Library/ArmLib.h>
#include <Chipset/ArmV7.h>
#include <Drivers/PL390Gic.h>
-#include <Library/L2X0CacheLib.h>
#include <Library/SerialPortLib.h>
#include <Library/ArmPlatformLib.h>
}
if (CoreId == 0) {
- // Initialize L2X0 but not enabled
- L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase), FALSE);
+ // Initialize peripherals that must be done at the early stage
+ // Example: Some L2x0 controllers must be initialized in Secure World
+ ArmPlatformInitialize ();
// If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
// If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
IoLib
ArmLib
ArmPlatformLib
- L2X0CacheLib
PL390GicSecLib
SerialPortLib
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize
- gArmTokenSpaceGuid.PcdL2x0ControllerBase
-
gArmTokenSpaceGuid.PcdGicDistributorBase
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase