IntelFsp2WrapperPkg: Support FSP Dispatch mode

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1300

Provides PCD selection for FSP Wrapper to support Dispatch
mode. Also PcdFspmBaseAddress should support Dynamic for
recovery scenario (multiple FSP-M binary in flash)

Test: Verified on internal platform and both API and
      DISPATCH modes booted successfully.

Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>

diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index 7b7c5f5d86a465fd3062a5f5a853ffbcdfe593c2..fa0441ce6c0eee9f54cb17ac5f90a2c35f240c78 100644 (file)
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -3,7 +3,7 @@
   register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
   notify to call FspSiliconInit API.\r
 \r
-  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -65,7 +65,7 @@ PeiFspMemoryInit (
   FspHobListPtr = NULL;\r
   FspmUpdDataPtr = NULL;\r
 \r
-  FspmHeaderPtr = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
+  FspmHeaderPtr = (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
   DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr));\r
   if (FspmHeaderPtr == NULL) {\r
     return EFI_DEVICE_ERROR;\r
@@ -155,8 +155,20 @@ FspmWrapperInit (
 {\r
   EFI_STATUS           Status;\r
 \r
-  Status = PeiFspMemoryInit ();\r
-  ASSERT_EFI_ERROR (Status);\r
+  Status = EFI_SUCCESS;\r
+\r
+  if (FixedPcdGet8 (PcdFspModeSelection) == 1) {\r
+    Status = PeiFspMemoryInit ();\r
+    ASSERT_EFI_ERROR (Status);\r
+  } else {\r
+    PeiServicesInstallFvInfoPpi (\r
+      NULL,\r
+      (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress),\r
+      (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBaseAddress))->FvLength,\r
+      NULL,\r
+      NULL\r
+      );\r
+  }\r
 \r
   return Status;\r
 }\r

diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
index 542356b5821f0bd1558e606b95408adcd90d6d57..b3776a80f36e557f885c6df6ff577f4ff65c1fbc 100644 (file)
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf
@@ -6,7 +6,7 @@
 # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
 # notify to call FspSiliconInit API.\r
 #\r
-#  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -61,6 +61,7 @@
 [Pcd]\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress     ## CONSUMES\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress  ## CONSUMES\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection    ## CONSUMES\r
 \r
 [Sources]\r
   FspmWrapperPeim.c\r

diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
index 70dac7a4142dc62c1ba8b549599fe17b097d8eea..87dd61e5c56b4d55465e74b41a54b1f59672fc39 100644 (file)
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
@@ -3,7 +3,7 @@
   register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
   notify to call FspSiliconInit API.\r
 \r
-  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -349,7 +349,17 @@ FspsWrapperPeimEntryPoint (
 {\r
   DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));\r
 \r
-  FspsWrapperInit ();\r
+  if (FixedPcdGet8 (PcdFspModeSelection) == 1) {\r
+    FspsWrapperInit ();\r
+  } else {\r
+    PeiServicesInstallFvInfoPpi (\r
+      NULL,\r
+      (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress),\r
+      (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsBaseAddress))->FvLength,\r
+      NULL,\r
+      NULL\r
+      );\r
+  }\r
 \r
   return EFI_SUCCESS;\r
 }\r

diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
index cd87a99c40af8706108fc24ee5466a55da5cb487..910286982ba0c84ffaad73ef3541c1fa7a7d5ac2 100644 (file)
--- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
+++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf
@@ -6,7 +6,7 @@
 # register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
 # notify to call FspSiliconInit API.\r
 #\r
-#  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -68,6 +68,7 @@
 [Pcd]\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress     ## CONSUMES\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress  ## CONSUMES\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection    ## CONSUMES\r
 \r
 [Guids]\r
   gFspHobGuid                           ## CONSUMES ## HOB\r

diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
index 69df16452d8865f23a93cc8b7d9f18586be841c3..96f2858fb4b779a3888e1dfde24afa94c7247a01 100644 (file)
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
@@ -71,9 +71,8 @@
   ## Indicate the PEI memory size platform want to report\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r
 \r
-  ## This is the base address of FSP-T/M/S\r
+  ## This is the base address of FSP-T\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300\r
-  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301\r
 \r
   ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>\r
   #  If a bit is set, that means this FSP API is skipped.<BR>\r
@@ -93,7 +92,17 @@
   # @Prompt Skip FSP API from FSP wrapper.\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009\r
 \r
+  ## This PCD decides how Wrapper code utilizes FSP\r
+  # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)\r
+  # 1: API mode (FSP Wrapper will call FSP API)\r
+  #\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A\r
+\r
 [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]\r
+  #\r
+  ## These are the base address of FSP-M/S\r
+  #\r
+  gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000\r
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001\r
   #\r
   # To provide flexibility for platform to pre-allocate FSP UPD buffer\r