} EFI_STATUS_CODE_DATA;\r
\r
\r
-//\r
-// Bit values for Authentication Status\r
-//\r
+///\r
+/// Bit values for Authentication Status\r
+///\r
+/// xx00 Image was not signed.\r
+/// xxx1 Platform security policy override. Assumes same meaning as 0010 (the image was signed, the\r
+/// signature was tested, and the signature passed authentication test).\r
+/// 0010 Image was signed, the signature was tested, and the signature passed authentication test.\r
+/// 0110 Image was signed and the signature was not tested.\r
+/// 1010 Image was signed, the signature was tested, and the signature failed the authentication test.\r
+///\r
#define EFI_AUTH_STATUS_PLATFORM_OVERRIDE 0x01\r
#define EFI_AUTH_STATUS_IMAGE_SIGNED 0x02\r
#define EFI_AUTH_STATUS_NOT_TESTED 0x04\r
@param This Interface pointer that implements the\r
particular EFI_PEI_SECURITY2_PPI instance.\r
@param AuthenticationStatus Authentication status of the file.\r
+ xx00 Image was not signed.\r
+ xxx1 Platform security policy override. \r
+ Assumes same meaning as 0010 (the image was signed, the\r
+ signature was tested, and the signature passed authentication test).\r
+ 0010 Image was signed, the signature was tested, \r
+ and the signature passed authentication test.\r
+ 0110 Image was signed and the signature was not tested.\r
+ 1010 Image was signed, the signature was tested, \r
+ and the signature failed the authentication test.\r
@param FvHandle Handle of the volume in which the file\r
resides. This allows different policies\r
depending on different firmware volumes.\r
typedef UINTN EFI_SMBUS_DEVICE_COMMAND;\r
\r
\r
-/*\r
+/**\r
Executes an SMBus operation to an SMBus controller. Returns when either \r
the command has been executed or an error is encountered in doing the operation.\r
\r
///\r
/// 16-bit protocol type number in host byte order.\r
///\r
- UINT16 SwAddressType; ///< Host byte order\r
+ UINT16 SwAddressType;\r
\r
///\r
/// Length in bytes of the station's protocol address to register.\r
/// StationAddress points to the first byte of this station's IP\r
/// address stored in network byte order.\r
///\r
- VOID *StationAddress; ///< Network byte order\r
+ VOID *StationAddress;\r
\r
///\r
/// The timeout value in 100-ns units that is associated with each\r
\r
typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL;\r
\r
+///\r
+/// The type of flush operation\r
+///\r
typedef enum {\r
EfiCpuFlushTypeWriteBackInvalidate,\r
EfiCpuFlushTypeWriteBack,\r
EfiCpuMaxFlushType\r
} EFI_CPU_FLUSH_TYPE;\r
\r
+///\r
+/// The type of processor INIT.\r
+///\r
typedef enum {\r
EfiCpuInit,\r
EfiCpuMaxInitType\r
}\r
\r
///\r
-/// Debug Support definitions\r
+/// Processor exception to be hooked.\r
+/// All exception types for IA32, X64, Itanium and EBC processors are defined.\r
///\r
typedef INTN EFI_EXCEPTION_TYPE;\r
\r
-//\r
-// IA-32 processor exception types\r
-//\r
+///\r
+/// IA-32 processor exception types\r
+///\r
#define EXCEPT_IA32_DIVIDE_ERROR 0\r
#define EXCEPT_IA32_DEBUG 1\r
#define EXCEPT_IA32_NMI 2\r
#define EXCEPT_IA32_MACHINE_CHECK 18\r
#define EXCEPT_IA32_SIMD 19\r
\r
-///\r
-/// IA-32 processor context definition\r
-///\r
///\r
/// FXSAVE_STATE\r
/// FP / MMX / XMM registers (see fxrstor instruction definition)\r
UINT8 Reserved11[14 * 16];\r
} EFI_FX_SAVE_STATE_IA32;\r
\r
+///\r
+/// IA-32 processor context definition\r
+///\r
typedef struct {\r
UINT32 ExceptionData;\r
EFI_FX_SAVE_STATE_IA32 FxSaveState;\r
UINT32 Eax;\r
} EFI_SYSTEM_CONTEXT_IA32;\r
\r
-//\r
-// x64 processor exception types\r
-//\r
+///\r
+/// x64 processor exception types\r
+///\r
#define EXCEPT_X64_DIVIDE_ERROR 0\r
#define EXCEPT_X64_DEBUG 1\r
#define EXCEPT_X64_NMI 2\r
#define EXCEPT_X64_MACHINE_CHECK 18\r
#define EXCEPT_X64_SIMD 19\r
\r
-///\r
-/// x64 processor context definition\r
///\r
/// FXSAVE_STATE\r
/// FP / MMX / XMM registers (see fxrstor instruction definition)\r
UINT8 Reserved11[14 * 16];\r
} EFI_FX_SAVE_STATE_X64;\r
\r
+///\r
+/// x64 processor context definition\r
+///\r
typedef struct {\r
UINT64 ExceptionData;\r
EFI_FX_SAVE_STATE_X64 FxSaveState;\r
UINT64 R15;\r
} EFI_SYSTEM_CONTEXT_X64;\r
\r
-//\r
-// IPF processor exception types\r
-//\r
+///\r
+/// Itanium Processor Family Exception types\r
+///\r
#define EXCEPT_IPF_VHTP_TRANSLATION 0\r
#define EXCEPT_IPF_INSTRUCTION_TLB 1\r
#define EXCEPT_IPF_DATA_TLB 2\r
\r
} EFI_SYSTEM_CONTEXT_IPF;\r
\r
-//\r
-// EBC processor exception types\r
-//\r
+///\r
+/// EBC processor exception types\r
+///\r
#define EXCEPT_EBC_UNDEFINED 0\r
#define EXCEPT_EBC_DIVIDE_ERROR 1\r
#define EXCEPT_EBC_DEBUG 2\r
#define EXCEPT_EBC_BREAKPOINT 3\r
#define EXCEPT_EBC_OVERFLOW 4\r
-#define EXCEPT_EBC_INVALID_OPCODE 5 // opcode out of range\r
+#define EXCEPT_EBC_INVALID_OPCODE 5 /// opcode out of range\r
#define EXCEPT_EBC_STACK_FAULT 6\r
#define EXCEPT_EBC_ALIGNMENT_CHECK 7\r
-#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 // malformed instruction\r
-#define EXCEPT_EBC_BAD_BREAK 9 // BREAK 0 or undefined BREAK\r
-#define EXCEPT_EBC_STEP 10 // to support debug stepping\r
+#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 /// malformed instruction\r
+#define EXCEPT_EBC_BAD_BREAK 9 /// BREAK 0 or undefined BREAK\r
+#define EXCEPT_EBC_STEP 10 /// to support debug stepping\r
///\r
/// For coding convenience, define the maximum valid EBC exception.\r
///\r
/// \r
typedef EFI_DEVICE_IO_PROTOCOL EFI_DEVICE_IO_INTERFACE;\r
\r
+///\r
+/// Device IO Access Width \r
+///\r
typedef enum {\r
IO_UINT8 = 0,\r
IO_UINT16 = 1,\r
0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \\r
}\r
\r
-//\r
-// Protocol GUID defined in EFI1.1.\r
-// \r
-\r
///\r
-/// Device Path information\r
+/// Device Path guid definition for backward-compatible with EFI1.1.\r
///\r
#define DEVICE_PATH_PROTOCOL EFI_DEVICE_PATH_PROTOCOL_GUID\r
\r
} EFI_DEVICE_PATH_PROTOCOL;\r
\r
///\r
-/// For backward-compatible with EFI1.1.\r
+/// Device Path protocol definition for backward-compatible with EFI1.1.\r
/// \r
typedef EFI_DEVICE_PATH_PROTOCOL EFI_DEVICE_PATH;\r
\r
} PCCARD_DEVICE_PATH;\r
\r
///\r
-/// Memory Mapped Device Path\r
+/// Memory Mapped Device Path SubType\r
///\r
#define HW_MEMMAP_DP 0x03\r
+\r
+///\r
+/// Memory Mapped Device Path\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
EFI_PHYSICAL_ADDRESS EndingAddress;\r
} MEMMAP_DEVICE_PATH;\r
\r
+///\r
+/// Hardware Vendor Device Path SubType\r
+///\r
+#define HW_VENDOR_DP 0x04\r
+\r
///\r
/// The Vendor Device Path allows the creation of vendor-defined Device Paths. A vendor must\r
/// allocate a Vendor GUID for a Device Path. The Vendor GUID can then be used to define the\r
/// contents on the n bytes that follow in the Vendor Device Path node.\r
///\r
-#define HW_VENDOR_DP 0x04\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
} VENDOR_DEVICE_PATH;\r
\r
///\r
-/// Controller Device Path\r
+/// Controller Device Path SubType\r
///\r
#define HW_CONTROLLER_DP 0x05\r
+\r
+///\r
+/// Controller Device Path\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
} CONTROLLER_DEVICE_PATH;\r
\r
///\r
-/// ACPI Device Paths\r
+/// ACPI Device Paths \r
///\r
#define ACPI_DEVICE_PATH 0x02\r
\r
///\r
-/// ACPI Device Path\r
+/// ACPI Device Path SubType\r
///\r
#define ACPI_DP 0x01\r
typedef struct {\r
} ACPI_HID_DEVICE_PATH;\r
\r
///\r
-/// Expanded ACPI Device Path.\r
+/// Expanded ACPI Device Path SubType\r
///\r
#define ACPI_EXTENDED_DP 0x02\r
typedef struct {\r
#define PNP_EISA_ID_MASK 0xffff\r
#define EISA_ID_TO_NUM(_Id) ((_Id) >> 16)\r
\r
+///\r
+/// ACPI _ADR Device Path SubType\r
+///\r
+#define ACPI_ADR_DP 0x03\r
\r
///\r
/// The _ADR device path is used to contain video output device attributes to support the Graphics\r
/// Output Protocol. The device path can contain multiple _ADR entries if multiple video output\r
/// devices are displaying the same output.\r
///\r
-#define ACPI_ADR_DP 0x03\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
/// least one _ADR value is required.\r
///\r
UINT32 ADR;\r
- ///\r
- /// This device path may optionally contain more than one _ADR entry.\r
- ///\r
+ //\r
+ // This device path may optionally contain more than one _ADR entry.\r
+ //\r
} ACPI_ADR_DEVICE_PATH;\r
\r
#define ACPI_ADR_DISPLAY_TYPE_OTHER 0\r
#define MESSAGING_DEVICE_PATH 0x03\r
\r
///\r
-/// ATAPI Device Path\r
+/// ATAPI Device Path SubType\r
///\r
#define MSG_ATAPI_DP 0x01\r
typedef struct {\r
} ATAPI_DEVICE_PATH;\r
\r
///\r
-/// SCSI Device Path\r
+/// SCSI Device Path SubType\r
///\r
#define MSG_SCSI_DP 0x02\r
typedef struct {\r
} SCSI_DEVICE_PATH;\r
\r
///\r
-/// Fibre Channel\r
+/// Fibre Channel SubType\r
///\r
#define MSG_FIBRECHANNEL_DP 0x03\r
typedef struct {\r
} FIBRECHANNEL_DEVICE_PATH;\r
\r
///\r
-/// 1394 Device Path\r
+/// 1394 Device Path SubType\r
///\r
#define MSG_1394_DP 0x04\r
typedef struct {\r
} F1394_DEVICE_PATH;\r
\r
///\r
-/// USB Device Path\r
+/// USB Device Path SubType\r
///\r
#define MSG_USB_DP 0x05\r
typedef struct {\r
} USB_DEVICE_PATH;\r
\r
///\r
-/// USB Class Device Path\r
+/// USB Class Device Path SubType\r
///\r
#define MSG_USB_CLASS_DP 0x0f\r
typedef struct {\r
} USB_CLASS_DEVICE_PATH;\r
\r
///\r
-/// This device path describes a USB device using its serial number.\r
-/// USB WWID Device Path\r
+/// USB WWID Device Path SubType\r
///\r
#define MSG_USB_WWID_DP 0x10\r
+\r
+///\r
+/// This device path describes a USB device using its serial number.\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
} USB_WWID_DEVICE_PATH;\r
\r
///\r
-/// Device Logical Unit\r
+/// Device Logical Unit SubType\r
///\r
#define MSG_DEVICE_LOGICAL_UNIT_DP 0x11\r
typedef struct {\r
} DEVICE_LOGICAL_UNIT_DEVICE_PATH;\r
\r
///\r
-/// SATA Device Path\r
+/// SATA Device Path SubType\r
///\r
#define MSG_SATA_DP 0x12\r
typedef struct {\r
} SATA_DEVICE_PATH;\r
\r
///\r
-/// I2O Device Path \r
+/// I2O Device Path SubType\r
///\r
#define MSG_I2O_DP 0x06\r
typedef struct {\r
} I2O_DEVICE_PATH;\r
\r
///\r
-/// MAC Address Device Path\r
+/// MAC Address Device Path SubType\r
///\r
#define MSG_MAC_ADDR_DP 0x0b\r
typedef struct {\r
} MAC_ADDR_DEVICE_PATH;\r
\r
///\r
-/// IPv4 Device Path\r
+/// IPv4 Device Path SubType\r
///\r
#define MSG_IPv4_DP 0x0c\r
typedef struct {\r
} IPv4_DEVICE_PATH;\r
\r
///\r
-/// IPv6 Device Path\r
+/// IPv6 Device Path SubType\r
///\r
#define MSG_IPv6_DP 0x0d\r
typedef struct {\r
} IPv6_DEVICE_PATH;\r
\r
///\r
-/// InfiniBand Device Path\r
+/// InfiniBand Device Path SubType\r
///\r
#define MSG_INFINIBAND_DP 0x09\r
typedef struct {\r
#define INFINIBAND_RESOURCE_FLAG_NETWORK_PROTOCOL 0x10\r
\r
///\r
-/// UART Device Path\r
+/// UART Device Path SubType\r
///\r
#define MSG_UART_DP 0x0e\r
typedef struct {\r
#define DEVICE_PATH_MESSAGING_VT_100_PLUS EFI_VT_100_PLUS_GUID\r
#define DEVICE_PATH_MESSAGING_VT_UTF8 EFI_VT_UTF8_GUID\r
\r
+#define DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL EFI_UART_DEVICE_PATH_GUID\r
+\r
///\r
/// A new device path node is defined to declare flow control characteristics.\r
/// UART Flow Control Messaging Device Path\r
///\r
-#define DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL EFI_UART_DEVICE_PATH_GUID\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
- /// DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL\r
+ /// DEVICE_PATH_MESSAGING_UART_FLOW_CONTROL GUID\r
///\r
EFI_GUID Guid;\r
///\r
UINT32 FlowControlMap;\r
} UART_FLOW_CONTROL_DEVICE_PATH;\r
\r
+#define DEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID\r
///\r
/// Serial Attached SCSI (SAS) devices.\r
///\r
-#define DEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
- /// DEVICE_PATH_MESSAGING_SAS\r
+ /// DEVICE_PATH_MESSAGING_SAS GUID\r
///\r
EFI_GUID Guid;\r
///\r
} SAS_DEVICE_PATH;\r
\r
///\r
-/// iSCSI Device Path Node (Base Information)\r
+/// iSCSI Device Path SubType\r
///\r
#define MSG_ISCSI_DP 0x13\r
typedef struct {\r
#define MEDIA_DEVICE_PATH 0x04\r
\r
///\r
-/// The Hard Drive Media Device Path is used to represent a partition on a hard drive.\r
-/// Hard Drive Media Device Path\r
+/// Hard Drive Media Device Path SubType\r
///\r
#define MEDIA_HARDDRIVE_DP 0x01\r
+\r
+///\r
+/// The Hard Drive Media Device Path is used to represent a partition on a hard drive.\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
#define SIGNATURE_TYPE_GUID 0x02\r
\r
///\r
-/// The CD-ROM Media Device Path is used to define a system partition that exists on a CD-ROM.\r
-/// CD-ROM Media Device Path\r
+/// CD-ROM Media Device Path SubType\r
///\r
#define MEDIA_CDROM_DP 0x02\r
+\r
+///\r
+/// The CD-ROM Media Device Path is used to define a system partition that exists on a CD-ROM.\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
UINT64 PartitionSize;\r
} CDROM_DEVICE_PATH;\r
\r
-///\r
-/// Use VENDOR_DEVICE_PATH struct\r
-///\r
-#define MEDIA_VENDOR_DP 0x03\r
+//\r
+// Use VENDOR_DEVICE_PATH struct\r
+//\r
+#define MEDIA_VENDOR_DP 0x03 /// Media vendor device path subtype\r
\r
///\r
-/// File Path Media Device Path\r
+/// File Path Media Device Path SubType\r
///\r
#define MEDIA_FILEPATH_DP 0x04\r
typedef struct {\r
\r
#define SIZE_OF_FILEPATH_DEVICE_PATH EFI_FIELD_OFFSET(FILEPATH_DEVICE_PATH,PathName)\r
\r
+///\r
+/// Media Protocol Device Path SubType\r
+///\r
+#define MEDIA_PROTOCOL_DP 0x05\r
+\r
///\r
/// The Media Protocol Device Path is used to denote the protocol that is being \r
/// used in a device path at the location of the path specified. \r
/// Many protocols are inherent to the style of device path.\r
///\r
-#define MEDIA_PROTOCOL_DP 0x05\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
} MEDIA_PROTOCOL_DEVICE_PATH;\r
\r
///\r
-/// This type is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware volume.\r
-/// PIWG Firmware Volume Device Path.\r
+/// PIWG Firmware Volume Device Path SubType\r
///\r
#define MEDIA_PIWG_FW_VOL_DP 0x7\r
+\r
+///\r
+/// This device path is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware volume.\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
} MEDIA_FW_VOL_DEVICE_PATH;\r
\r
///\r
-/// This type is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware file.\r
-/// PIWG Firmware Volume Device Path\r
+/// PIWG Firmware Volume Device Path SubType\r
///\r
#define MEDIA_PIWG_FW_FILE_DP 0x6\r
+\r
+///\r
+/// This device path is used by systems implementing the UEFI PI Specification 1.0 to describe a firmware file.\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
} MEDIA_FW_VOL_FILEPATH_DEVICE_PATH;\r
\r
///\r
-/// This Device Path is used to describe the booting of non-EFI-aware operating systems.\r
/// BIOS Boot Specification Device Path\r
///\r
#define BBS_DEVICE_PATH 0x05\r
+\r
+///\r
+/// BIOS Boot Specification Device Path SubType\r
+///\r
#define BBS_BBS_DP 0x01\r
+\r
+///\r
+/// This Device Path is used to describe the booting of non-EFI-aware operating systems.\r
+///\r
typedef struct {\r
EFI_DEVICE_PATH_PROTOCOL Header;\r
///\r
///\r
/// Union of all possible Device Paths and pointers to Device Paths\r
///\r
-\r
typedef union {\r
EFI_DEVICE_PATH_PROTOCOL DevPath;\r
PCI_DEVICE_PATH Pci;\r
typedef struct _EFI_DRIVER_CONFIGURATION2_PROTOCOL EFI_DRIVER_CONFIGURATION2_PROTOCOL;\r
\r
typedef enum {\r
+ ///\r
+ /// The controller is still in a usable state. No actions\r
+ /// are required before this controller can be used again.\r
+ ///\r
EfiDriverConfigurationActionNone = 0,\r
+ ///\r
+ /// The driver has detected that the controller is not in a\r
+ /// usable state, and it needs to be stopped.\r
+ ///\r
EfiDriverConfigurationActionStopController = 1,\r
+ ///\r
+ /// This controller needs to be stopped and restarted\r
+ /// before it can be used again.\r
+ ///\r
EfiDriverConfigurationActionRestartController = 2,\r
+ ///\r
+ /// A configuration change has been made that requires the platform to be restarted before\r
+ /// the controller can be used again.\r
+ ///\r
EfiDriverConfigurationActionRestartPlatform = 3,\r
EfiDriverConfigurationActionMaximum\r
} EFI_DRIVER_CONFIGURATION_ACTION_REQUIRED;\r
typedef struct _EFI_DRIVER_DIAGNOSTICS_PROTOCOL EFI_DRIVER_DIAGNOSTICS_PROTOCOL;\r
\r
typedef enum {\r
+ ///\r
+ /// Performs standard diagnostics on the controller.\r
+ ///\r
EfiDriverDiagnosticTypeStandard = 0,\r
+ ///\r
+ /// This is an optional diagnostic type that performs diagnostics on the controller that may\r
+ /// take an extended amount of time to execute.\r
+ ///\r
EfiDriverDiagnosticTypeExtended = 1,\r
+ ///\r
+ /// This is an optional diagnostic type that performs diagnostics on the controller that are\r
+ /// suitable for a manufacturing and test environment.\r
+ ///\r
EfiDriverDiagnosticTypeManufacturing= 2,\r
EfiDriverDiagnosticTypeMaximum\r
} EFI_DRIVER_DIAGNOSTIC_TYPE;\r
/// \r
typedef EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_INTERFACE;\r
\r
-typedef enum {\r
- EfiNetworkInterfaceUndi = 1\r
-} EFI_NETWORK_PROTOCOL_TYPE;\r
-\r
///\r
/// An optional protocol that is used to describe details about the software \r
/// layer that is used to produce the Simple Network Protocol. \r
typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;\r
\r
///\r
-/// Prototypes for the PCI I/O Protocol\r
+/// *******************************************************\r
+/// EFI_PCI_IO_PROTOCOL_WIDTH\r
+/// *******************************************************\r
///\r
typedef enum {\r
EfiPciIoWidthUint8 = 0,\r
\r
typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
\r
+///\r
+/// *******************************************************\r
+/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH\r
+/// *******************************************************\r
+///\r
typedef enum {\r
EfiPciWidthUint8,\r
EfiPciWidthUint16,\r
EfiPciWidthMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
\r
+///\r
+/// *******************************************************\r
+/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION\r
+/// *******************************************************\r
+///\r
typedef enum {\r
+ ///\r
+ /// A read operation from system memory by a bus master that is not capable of producing\r
+ /// PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterRead,\r
+ ///\r
+ /// A write operation from system memory by a bus master that is not capable of producing\r
+ /// PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterWrite,\r
+ ///\r
+ /// Provides both read and write access to system memory by both the processor and a bus\r
+ /// master that is not capable of producing PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterCommonBuffer,\r
+ ///\r
+ /// A read operation from system memory by a bus master that is capable of producing PCI\r
+ /// dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterRead64,\r
+ ///\r
+ /// A write operation to system memory by a bus master that is capable of producing PCI\r
+ /// dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterWrite64,\r
+ ///\r
+ /// Provides both read and write access to system memory by both the processor and a bus\r
+ /// master that is capable of producing PCI dual address cycles.\r
+ ///\r
EfiPciOperationBusMasterCommonBuffer64,\r
EfiPciOperationMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
///\r
#define EFI_PXE_BASE_CODE_MAX_IPCNT 8\r
\r
+///\r
+/// IP Receive Filter structure\r
+///\r
typedef struct {\r
UINT8 Filters;\r
UINT8 IpCnt;\r
#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS_MULTICAST 0x0008\r
\r
///\r
-/// ARP Cache definitions\r
+/// ARP cache entries\r
///\r
typedef struct {\r
EFI_IP_ADDRESS IpAddr;\r
EFI_MAC_ADDRESS MacAddr;\r
} EFI_PXE_BASE_CODE_ARP_ENTRY;\r
\r
+///\r
+/// ARP route table entries\r
+///\r
typedef struct {\r
EFI_IP_ADDRESS IpAddr;\r
EFI_IP_ADDRESS SubnetMask;\r
} EFI_PXE_BASE_CODE_DISCOVER_INFO;\r
\r
///\r
-/// Mtftp() definitions\r
+/// TFTP opcode definitions\r
///\r
typedef enum {\r
EFI_PXE_BASE_CODE_TFTP_FIRST,\r
EFI_PXE_BASE_CODE_MTFTP_LAST\r
} EFI_PXE_BASE_CODE_TFTP_OPCODE;\r
\r
+///\r
+/// MTFTP information. This information is required\r
+/// to start or join a multicast TFTP session. It is also required to\r
+/// perform the "get file size" and "read directory" operations of MTFTP.\r
+///\r
typedef struct {\r
EFI_IP_ADDRESS MCastIp;\r
EFI_PXE_BASE_CODE_UDP_PORT CPort;\r
} EFI_PXE_BASE_CODE_MTFTP_INFO;\r
\r
///\r
-/// Packet definitions\r
+/// DHCPV4 Packet structure\r
///\r
typedef struct {\r
UINT8 BootpOpcode;\r
UINT8 DhcpOptions[56];\r
} EFI_PXE_BASE_CODE_DHCPV4_PACKET;\r
\r
+///\r
+/// Packet structure\r
+///\r
typedef union {\r
UINT8 Raw[1472];\r
EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4;\r
-\r
- ///\r
- /// EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;\r
- ///\r
+ //\r
+ // EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;\r
+ //\r
} EFI_PXE_BASE_CODE_PACKET;\r
\r
-\r
//\r
// PXE Base Code Mode structure\r
//\r
#define EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES 8\r
#define EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES 8\r
\r
+///\r
+/// EFI_PXE_BASE_CODE_MODE\r
+/// The data values in this structure are read-only and \r
+/// are updated by the code that produces the\r
+/// EFI_PXE_BASE_CODE_PROTOCOL functions.\r
+///\r
typedef struct {\r
BOOLEAN Started;\r
BOOLEAN Ipv6Available;\r
/// \r
typedef EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL EFI_PXE_BASE_CODE_CALLBACK;\r
\r
+///\r
+/// Event type list for PXE Base Code Protocol function\r
+///\r
typedef enum {\r
EFI_PXE_BASE_CODE_FUNCTION_FIRST,\r
EFI_PXE_BASE_CODE_FUNCTION_DHCP,\r
EFI_PXE_BASE_CODE_PXE_FUNCTION_LAST\r
} EFI_PXE_BASE_CODE_FUNCTION;\r
\r
+///\r
+/// Callback status type\r
+///\r
typedef enum {\r
EFI_PXE_BASE_CODE_CALLBACK_STATUS_FIRST,\r
EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE,\r
typedef EFI_SERIAL_IO_PROTOCOL SERIAL_IO_INTERFACE;\r
\r
///\r
-/// Serial IO Data structures\r
+/// Parity type that is computed or checked as each character is transmitted or received. If the\r
+/// device does not support parity, the value is the default parity value.\r
///\r
typedef enum {\r
DefaultParity,\r
SpaceParity\r
} EFI_PARITY_TYPE;\r
\r
+///\r
+/// Stop bits type\r
+///\r
typedef enum {\r
DefaultStopBits,\r
OneStopBit,\r
\r
} EFI_NETWORK_STATISTICS;\r
\r
+///\r
+/// State of the network interface\r
+/// When an EFI_SIMPLE_NETWORK_PROTOCOL driver initializes a\r
+/// network interface, the network interface is left in the EfiSimpleNetworkStopped state.\r
+///\r
typedef enum {\r
EfiSimpleNetworkStopped,\r
EfiSimpleNetworkStarted,\r
EFI_TCP4_OPTION *ControlOption;\r
} EFI_TCP4_CONFIG_DATA;\r
\r
+///\r
+/// TCP4 connnection state\r
+///\r
typedef enum {\r
Tcp4StateClosed = 0,\r
Tcp4StateListen = 1,\r
UINT32 Raw;\r
} EFI_UGA_PIXEL_UNION;\r
\r
-/**\r
- Enumration value for actions of Blt operations.\r
- **/\r
+///\r
+/// Enumration value for actions of Blt operations.\r
+///\r
typedef enum {\r
EfiUgaVideoFill, ///< Write data from the BltBuffer pixel (SourceX, SourceY)\r
///< directly to every pixel of the video display rectangle\r
UgaDtOutputController,\r
UgaDtOutputPort,\r
UgaDtOther\r
-}\r
-UGA_DEVICE_TYPE, *PUGA_DEVICE_TYPE;\r
+} UGA_DEVICE_TYPE, *PUGA_DEVICE_TYPE;\r
\r
typedef UINT32 UGA_DEVICE_ID, *PUGA_DEVICE_ID;\r
\r
UGA_DEVICE_ID deviceId;\r
UINT32 ui32DeviceContextSize;\r
UINT32 ui32SharedContextSize;\r
-}\r
-UGA_DEVICE_DATA, *PUGA_DEVICE_DATA;\r
+} UGA_DEVICE_DATA, *PUGA_DEVICE_DATA;\r
\r
typedef struct _UGA_DEVICE {\r
VOID *pvDeviceContext;\r
VOID *pvBusIoServices;\r
VOID *pvStdIoServices;\r
UGA_DEVICE_DATA deviceData;\r
-}\r
-UGA_DEVICE, *PUGA_DEVICE;\r
+} UGA_DEVICE, *PUGA_DEVICE;\r
\r
typedef enum {\r
UgaIoGetVersion = 1,\r
UgaIoGetDevicePropertySize,\r
UgaIoGetDeviceProperty,\r
UgaIoBtPrivateInterface\r
-}\r
-UGA_IO_REQUEST_CODE, *PUGA_IO_REQUEST_CODE;\r
+} UGA_IO_REQUEST_CODE, *PUGA_IO_REQUEST_CODE;\r
\r
typedef struct {\r
IN UGA_IO_REQUEST_CODE ioRequestCode;\r
\r
\r
typedef struct {\r
- UINT16 PortStatus;\r
- UINT16 PortChangeStatus;\r
+ UINT16 PortStatus; /// Contains current port status bitmap.\r
+ UINT16 PortChangeStatus; /// Contains current port status change bitmap.\r
} EFI_USB_PORT_STATUS;\r
\r
-//\r
-// Constant value for Port Status & Port Change Status\r
-//\r
+///\r
+/// EFI_USB_PORT_STATUS.PortStatus bit definition \r
+///\r
#define USB_PORT_STAT_CONNECTION 0x0001\r
#define USB_PORT_STAT_ENABLE 0x0002\r
#define USB_PORT_STAT_SUSPEND 0x0004\r
#define USB_PORT_STAT_HIGH_SPEED 0x0400\r
#define USB_PORT_STAT_OWNER 0x0800\r
\r
+///\r
+/// EFI_USB_PORT_STATUS.PortChangeStatus bit definition \r
+///\r
#define USB_PORT_STAT_C_CONNECTION 0x0001\r
#define USB_PORT_STAT_C_ENABLE 0x0002\r
#define USB_PORT_STAT_C_SUSPEND 0x0004\r
#define USB_PORT_STAT_C_RESET 0x0010\r
\r
\r
-//\r
-// Usb port features\r
-//\r
+///\r
+/// Usb port features value\r
+/// Each value indicates its bit index in the port status and status change bitmaps, \r
+/// if combines these two bitmaps into a 32-bit bitmap.\r
+///\r
typedef enum {\r
EfiUsbPortEnable = 1,\r
EfiUsbPortSuspend = 2,\r
EfiUsbPortResetChange = 20\r
} EFI_USB_PORT_FEATURE;\r
\r
-\r
-#define EFI_USB_SPEED_FULL 0x0000 // 12 Mb/s, USB 1.1 OHCI and UHCI HC.\r
-#define EFI_USB_SPEED_LOW 0x0001 // 1 Mb/s, USB 1.1 OHCI and UHCI HC.\r
-#define EFI_USB_SPEED_HIGH 0x0002 // 480 Mb/s, USB 2.0 EHCI HC.\r
+#define EFI_USB_SPEED_FULL 0x0000 /// 12 Mb/s, USB 1.1 OHCI and UHCI HC.\r
+#define EFI_USB_SPEED_LOW 0x0001 /// 1 Mb/s, USB 1.1 OHCI and UHCI HC.\r
+#define EFI_USB_SPEED_HIGH 0x0002 /// 480 Mb/s, USB 2.0 EHCI HC.\r
\r
typedef struct {\r
- UINT8 TranslatorHubAddress;\r
- UINT8 TranslatorPortNumber;\r
+ UINT8 TranslatorHubAddress; /// device address\r
+ UINT8 TranslatorPortNumber; /// the port number of the hub that device is connected to.\r
} EFI_USB2_HC_TRANSACTION_TRANSLATOR;\r
\r
//\r
\r
//\r
// Definitions for Keyboard Package\r
-// Section 27.3.9\r
// Releated definitions are in Section of EFI_HII_DATABASE_PROTOCOL\r
//\r
\r
+///\r
+/// Each enumeration values maps a physical key on a keyboard.\r
+///\r
typedef enum { \r
EfiKeyLCtrl,\r
EfiKeyA0, \r