+++ /dev/null
-/** @file\r
- SwitchStack() function for IPF.\r
-\r
- Copyright (c) 2007, Intel Corporation<BR>\r
- All rights reserved. This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <PeiMain.h>\r
-\r
-VOID\r
-EFIAPI\r
-IpfAsmSwitchStack (\r
- IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
- IN VOID *ConText1, OPTIONAL\r
- IN VOID *Context2, OPTIONAL\r
- IN VOID *Context3, OPTIONAL\r
- IN VOID *NewStack,\r
- IN VOID *NewBsp\r
- );\r
-\r
-/**\r
- Transfers control to a function starting with a new stack.\r
-\r
- Transfers control to the function specified by EntryPoint using the\r
- new stack specified by NewStack and passing in the parameters specified\r
- by Context1 and Context2. Context1 and Context2 are optional and may\r
- be NULL. The function EntryPoint must never return.\r
- Marker will be ignored on IA-32, x64, and EBC.\r
- IPF CPUs expect one additional parameter of type VOID * that specifies\r
- the new backing store pointer.\r
-\r
- If EntryPoint is NULL, then ASSERT().\r
- If NewStack is NULL, then ASSERT().\r
-\r
- @param EntryPoint A pointer to function to call with the new stack.\r
- @param Context1 A pointer to the context to pass into the EntryPoint\r
- function.\r
- @param Context2 A pointer to the context to pass into the EntryPoint\r
- function.\r
- @param NewStack A pointer to the new stack to use for the EntryPoint\r
- function.\r
- @param Marker VA_LIST marker for the variable argument list.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-InternalSwitchStack (\r
- IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
- IN VOID *Context1, OPTIONAL\r
- IN VOID *Context2, OPTIONAL\r
- IN VOID *Context3, OPTIONAL\r
- IN VOID *NewStack,\r
- IN VA_LIST Marker\r
- )\r
-\r
-{\r
- VOID *NewBsp;\r
-\r
- //\r
- // Get new backing store pointer from variable list\r
- //\r
- NewBsp = VA_ARG (Marker, VOID *);\r
-\r
- //\r
- // Stack should be aligned with CPU_STACK_ALIGNMENT\r
- //\r
- ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);\r
- ASSERT (((UINTN)NewBsp & (CPU_STACK_ALIGNMENT - 1)) == 0);\r
-\r
- IpfAsmSwitchStack (EntryPoint, Context1, Context2, Context3, NewStack, NewBsp);\r
-}\r
+++ /dev/null
-//++\r
-// Copyright (c) 2006, Intel Corporation \r
-// All rights reserved. This program and the accompanying materials \r
-// are licensed and made available under the terms and conditions of the BSD License \r
-// which accompanies this distribution. The full text of the license may be found at \r
-// http://opensource.org/licenses/bsd-license.php \r
-// \r
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-// \r
-// Module Name:\r
-// \r
-// IpfCpuCore.i\r
-//\r
-// Abstract:\r
-// IPF CPU definitions\r
-//\r
-//--\r
-\r
-#ifndef _IPF_CPU_CORE_\r
-#define _IPF_CPU_CORE_\r
-\r
-#define PEI_BSP_STORE_SIZE 0x4000\r
-#define ResetFn 0x00\r
-#define MachineCheckFn 0x01\r
-#define InitFn 0x02\r
-#define RecoveryFn 0x03\r
-#define GuardBand 0x10 \r
-\r
-//\r
-// Define hardware RSE Configuration Register\r
-//\r
-\r
-//\r
-// RS Configuration (RSC) bit field positions\r
-//\r
-#define RSC_MODE 0\r
-#define RSC_PL 2\r
-#define RSC_BE 4\r
-//\r
-// RSC bits 5-15 reserved\r
-//\r
-#define RSC_MBZ0 5\r
-#define RSC_MBZ0_V 0x3ff\r
-#define RSC_LOADRS 16\r
-#define RSC_LOADRS_LEN 14\r
-//\r
-// RSC bits 30-63 reserved\r
-//\r
-#define RSC_MBZ1 30\r
-#define RSC_MBZ1_V 0x3ffffffffULL\r
-\r
-//\r
-// RSC modes\r
-//\r
-\r
-//\r
-// Lazy\r
-//\r
-#define RSC_MODE_LY (0x0)\r
-//\r
-// Store intensive\r
-//\r
-#define RSC_MODE_SI (0x1)\r
-//\r
-// Load intensive\r
-//\r
-#define RSC_MODE_LI (0x2)\r
-//\r
-// Eager\r
-//\r
-#define RSC_MODE_EA (0x3)\r
-\r
-//\r
-// RSC Endian bit values\r
-//\r
-#define RSC_BE_LITTLE 0\r
-#define RSC_BE_BIG 1\r
-\r
-//\r
-// RSC while in kernel: enabled, little endian, pl = 0, eager mode\r
-//\r
-#define RSC_KERNEL ((RSC_MODE_EA<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))\r
-//\r
-// Lazy RSC in kernel: enabled, little endian, pl = 0, lazy mode\r
-//\r
-#define RSC_KERNEL_LAZ ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))\r
-//\r
-// RSE disabled: disabled, pl = 0, little endian, eager mode\r
-//\r
-#define RSC_KERNEL_DISABLED ((RSC_MODE_LY<<RSC_MODE) | (RSC_BE_LITTLE<<RSC_BE))\r
-\r
-#endif\r
#include "IpfMacro.i"\r
#include "Ipf/IpfCpuCore.i"\r
\r
-//----------------------------------------------------------------------------------\r
-// This module supports terminating CAR (Cache As RAM) stage. It copies all the\r
-// CAR data into real RAM and then makes a stack switch.\r
-\r
-// EFI_STATUS\r
-// SwitchCoreStacks (\r
-// IN VOID *EntryPoint,\r
-// IN UINTN CopySize,\r
-// IN VOID *OldBase,\r
-// IN VOID *NewBase\r
-// IN UINTN NewSP, OPTIONAL\r
-// IN UINTN NewBSP OPTIONAL\r
-// )\r
-// EFI_STATUS\r
-// SwitchCoreStacks (\r
-// IN VOID *EntryPointForContinuationFunction,\r
-// IN UINTN StartupDescriptor,\r
-// IN VOID PEICorePointer,\r
-// IN UINTN NewSP\r
-// )\r
-//----------------------------------------------------------------------------------\r
-PROCEDURE_ENTRY (SwitchCoreStacks)\r
-\r
- NESTED_SETUP (4,2,0,0)\r
-\r
- // first save all stack registers in GPRs.\r
- mov r13 = in0;; // this is a pointer to the PLABEL of the continuation function.\r
- ld8 r16 = [r13],8;; // r16 = address of continuation function from the PLABEL\r
- ld8 gp = [r13];; // gp = gp of continuation function from the PLABEL\r
- mov b1 = r16;;\r
-\r
- // save the parameters in r5, r6. these 2 seemed to be preserved across PAL calls\r
- mov r5 = in1;; // this is the parameter1 to pass to the continuation function\r
- mov r6 = in2;; // this is the parameter2 to pass to the continuation function\r
- dep r6=0,r6,63,1;; // zero the bit 63.\r
-\r
- mov r8 = in3;; // new stack pointer.\r
-\r
- // r8 has the sp, this is 128K stack size, from this we will reserve 16K for the bspstore\r
- movl r15 = PEI_BSP_STORE_SIZE;;\r
- sub r8 = r8, r15;;\r
- add r15 = (GuardBand),r8;; // some little buffer, now r15 will be our bspstore\r
-\r
- // save the bspstore value to r4, save sp value to r7\r
- mov r4 = r15\r
- mov r7 = r8\r
- mov r16 = r8;; // will be the new sp in uncache mode\r
-\r
-\r
- alloc r11=0,0,0,0;; // Set 0-size frame\r
- flushrs;;\r
-\r
- mov r21 = RSC_KERNEL_DISABLED;; // for rse disable\r
- mov ar.rsc = r21;; // turn off RSE\r
-\r
- add sp = r0, r16 // transfer to the EFI stack\r
- mov ar.bspstore = r15 // switch to EFI BSP\r
- invala // change of ar.bspstore needs invala.\r
-\r
- mov r19 = RSC_KERNEL_LAZ;; // RSC enabled, Lazy mode\r
- mov ar.rsc = r19;; // turn rse on, in kernel mode\r
-\r
-//-----------------------------------------------------------------------------------\r
-// Save here the meaningful stuff for next few lines and then make the PAL call.\r
-// Make PAL call to terminate the CAR status.\r
- // AVL: do this only for recovery check call...\r
-\r
- mov r28=ar.k3;;\r
- dep r2 = r28,r0,0,8;; // Extract Function bits from GR20.\r
- cmp.eq p6,p7 = RecoveryFn,r2;; // Is it Recovery check\r
- (p7) br.sptk.few DoneCARTermination; // if not, don't terminate car..\r
-\r
-TerminateCAR::\r
-\r
- mov r28 = ip;;\r
- add r28 = (DoneCARTerminationPALCall - TerminateCAR),r28;;\r
- mov b0 = r28\r
-\r
- mov r8 = ar.k5;;\r
- mov b6 = r8\r
- mov r28 = 0x208\r
-\r
- mov r29 = r0\r
- mov r30 = r0\r
- mov r31 = r0\r
- mov r8 = r0;;\r
- br.sptk.few b6;; // Call PAL-A call.\r
-\r
-DoneCARTerminationPALCall::\r
-\r
-// don't check error in soft sdv, it is always returning -1 for this call for some reason\r
-#if SOFT_SDV\r
-#else\r
-ReturnToPEIMain::\r
- cmp.eq p6,p7 = r8,r0;;\r
- //\r
- // dead loop if the PAL call failed, we have the CAR on but the stack is now pointing to memory\r
- //\r
- (p7) br.sptk.few ReturnToPEIMain;;\r
- //\r
- // PAL call successed,now the stack are in memory so come into cache mode\r
- // instead of uncache mode\r
- //\r
-\r
- alloc r11=0,0,0,0;; // Set 0-size frame\r
- flushrs;;\r
-\r
- mov r21 = RSC_KERNEL_DISABLED;; // for rse disable\r
- mov ar.rsc = r21;; // turn off RSE\r
-\r
- dep r6 = 0,r6,63,1 // zero the bit 63\r
- dep r7 = 0,r7,63,1 // zero the bit 63\r
- dep r4 = 0,r4,63,1;; // zero the bit 63\r
- add sp = r0, r7 // transfer to the EFI stack in cache mode\r
- mov ar.bspstore = r4 // switch to EFI BSP\r
- invala // change of ar.bspstore needs invala.\r
-\r
- mov r19 = RSC_KERNEL_LAZ;; // RSC enabled, Lazy mode\r
- mov ar.rsc = r19;; // turn rse on, in kernel mode\r
-\r
-#endif\r
-\r
-DoneCARTermination::\r
-\r
- // allocate a stack frame:\r
- alloc r11=0,2,2,0 ;; // alloc outs going to ensuing DXE IPL service\r
- // on the new stack\r
- mov out0 = r5;;\r
- mov out1 = r6;;\r
-\r
- mov r16 = b1;;\r
- mov b6 = r16;;\r
- br.call.sptk.few b0=b6;; // Call the continuation function\r
-\r
- NESTED_RETURN\r
-\r
-PROCEDURE_EXIT(SwitchCoreStacks)\r
-//-----------------------------------------------------------------------------------\r
-\r
//---------------------------------------------------------------------------------\r
//++\r
// GetHandOffStatus\r
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