// Byte packed structure for an 16-bit real mode thunks\r
//\r
typedef struct {\r
- IA32_REGISTER_SET RealModeState;\r
+ IA32_REGISTER_SET *RealModeState;\r
VOID *RealModeBuffer;\r
- UINTN RealModeBufferSize;\r
- VOID *CallStack;\r
- UINTN CallStackSize;\r
- VOID *RealModeCode;\r
- UINTN RealModeCodeSize;\r
+ UINT32 RealModeBufferSize;\r
+ UINT32 ThunkAttributes;\r
} THUNK_CONTEXT;\r
\r
+#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r
+#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
+\r
/**\r
Retrieves CPUID information.\r
\r
// 16-bit thunking services\r
//\r
\r
+/**\r
+ Retrieves the properties for 16-bit thunk functions.\r
+\r
+ Computes the size of the buffer and stack below 1MB required to use the\r
+ AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
+ buffer size is returned in RealModeBufferSize, and the stack size is returned\r
+ in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
+ then the actual minimum stack size is ExtraStackSize plus the maximum number\r
+ of bytes that need to be passed to the 16-bit real mode code.\r
+\r
+ If RealModeBufferSize is NULL, then ASSERT().\r
+ If ExtraStackSize is NULL, then ASSERT().\r
+\r
+ @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r
+ required to use the 16-bit thunk functions.\r
+ @param ExtraStackSize A pointer to the extra size of stack below 1MB\r
+ that the 16-bit thunk functions require for\r
+ temporary storage in the transition to and from\r
+ 16-bit real mode.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmGetThunk16Properties (\r
+ OUT UINT32 *RealModeBufferSize,\r
+ OUT UINT32 *ExtraStackSize\r
+ );\r
+\r
/**\r
Prepares all structures a code required to use AsmThunk16().\r
\r
<Filename>Ipf/InterlockedCompareExchange32.s</Filename>\r
<Filename>Ipf/InterlockedCompareExchange64.s</Filename>\r
<Filename>Ipf/Synchronization.c</Filename>\r
+ <Filename>Ipf/CpuPause.s</Filename>\r
</Arch>\r
<Arch ArchType="EBC">\r
<Filename>Math64.c</Filename>\r
<Filename>SetJumpLongJump.c</Filename>\r
<Filename>Unaligned.c</Filename>\r
<Filename>Ebc/CpuBreakpoint.c</Filename>\r
+ <Filename>Ebc/Synchronization.c</Filename>\r
</Arch>\r
</SourceFiles>\r
- <Includes>\r
+ <Includes>\r
<PackageName>MdePkg</PackageName>\r
</Includes>\r
<PCDs>\r
ASSERT (FALSE);\r
return FALSE;\r
}\r
+\r
+/**\r
+ Enables CPU interrupts for the smallest window required to capture any\r
+ pending interrupts.\r
+\r
+ Enables CPU interrupts for the smallest window required to capture any\r
+ pending interrupts.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EnableDisableInterrupts (\r
+ VOID\r
+ )\r
+{\r
+ EnableInterrupts ();\r
+ DisableInterrupts ();\r
+}\r
+\r
+/**\r
+ Requests CPU to pause for a short period of time.\r
+\r
+ Requests CPU to pause for a short period of time. Typically used in MP\r
+ systems to prevent memory starvation while waiting for a spin lock.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+CpuPause (\r
+ VOID\r
+ )\r
+{\r
+}\r
+\r
+/**\r
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
+\r
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+CpuFlushTlb (\r
+ VOID\r
+ )\r
+{\r
+ ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+ Places the CPU in a sleep state until an interrupt is received.\r
+\r
+ Places the CPU in a sleep state until an interrupt is received. If interrupts\r
+ are disabled prior to calling this function, then the CPU will be placed in a\r
+ sleep state indefinitely.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+CpuSleep (\r
+ VOID\r
+ )\r
+{\r
+}\r
--- /dev/null
+/** @file\r
+ Implementation of synchronization functions on EBC.\r
+\r
+ Copyright (c) 2006, Intel Corporation<BR>\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: Synchronization.c\r
+\r
+**/\r
+\r
+UINT32\r
+EFIAPI\r
+InternalSyncCompareExchange32 (\r
+ IN volatile UINT32 *Value,\r
+ IN UINT32 CompareValue,\r
+ IN UINT32 ExchangeValue\r
+ )\r
+{\r
+ return *Value != CompareValue ? *Value :\r
+ ((*Value = ExchangeValue), CompareValue);\r
+}\r
+\r
+UINT64\r
+EFIAPI\r
+InternalSyncCompareExchange64 (\r
+ IN volatile UINT64 *Value,\r
+ IN UINT64 CompareValue,\r
+ IN UINT64 ExchangeValue\r
+ )\r
+{\r
+ return *Value != CompareValue ? *Value :\r
+ ((*Value = ExchangeValue), CompareValue);\r
+}\r
+\r
+UINT32\r
+EFIAPI\r
+InternalSyncIncrement (\r
+ IN volatile UINT32 *Value\r
+ )\r
+{\r
+ return ++*Value;\r
+}\r
+\r
+UINT32\r
+EFIAPI\r
+InternalSyncDecrement (\r
+ IN volatile UINT32 *Value\r
+ )\r
+{\r
+ return --*Value;\r
+}\r
.686p\r
.model flat,C\r
\r
- .data\r
+EXTERNDEF C m16Start:BYTE\r
+EXTERNDEF C m16Size:WORD\r
+EXTERNDEF C mThunk16Attr:WORD\r
+EXTERNDEF C m16Gdt:WORD\r
+EXTERNDEF C m16GdtrBase:WORD\r
+EXTERNDEF C mTransition:WORD\r
\r
-NullSegSel DQ 0\r
-_16BitCsSel LABEL QWORD\r
- DW -1\r
- DW 0\r
- DB 0\r
- DB 9bh\r
- DB 8fh ; 16-bit segment\r
- DB 0\r
-_16BitDsSel LABEL QWORD\r
- DW -1\r
- DW 0\r
- DB 0\r
- DB 93h\r
- DB 8fh ; 16-bit segment\r
- DB 0\r
-GdtEnd LABEL QWORD\r
-\r
- .const\r
-\r
-_16Gdtr LABEL FWORD\r
- DW offset GdtEnd - offset NullSegSel - 1\r
- DD offset NullSegSel\r
-\r
-_16Idtr FWORD (1 SHL 10) - 1\r
-\r
- .code\r
+THUNK_ATTRIBUTE_BIG_REAL_MODE EQU 1\r
+THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 EQU 2\r
+THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL EQU 4\r
\r
IA32_REGS STRUC 4t\r
_EDI DD ?\r
_SS DW ?\r
IA32_REGS ENDS\r
\r
-InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs\r
- mov esi, [esp + 36] ; esi <- RegSet\r
- push sizeof (IA32_REGS)\r
- pop ecx\r
- movzx edx, (IA32_REGS ptr [esi])._SS\r
- mov edi, (IA32_REGS ptr [esi])._ESP\r
- sub edi, ecx ; reserve space on realmode stack\r
- push edi ; save stack offset\r
- imul eax, edx, 16 ; eax <- edx * 16\r
- add edi, eax ; edi <- linear address of 16-bit stack\r
- rep movsb ; copy RegSet\r
- mov esi, edx ; esi <- 16-bit stack segment\r
- pop ebx ; ebx <- 16-bit stack offset\r
- mov edi, [esp + 40] ; edi <- realmode patch\r
- push cs ; save CS segment selector\r
- push offset @BackToThunk ; offset to back from real mode\r
- mov eax, offset @16Return\r
- stosd\r
- xor eax, eax\r
- stosw ; set CS base to 0\r
- mov eax, esp\r
- stosd\r
- mov eax, ss\r
- stosd\r
- mov eax, cr0\r
- mov ecx, eax ; ecx <- CR0\r
- and ecx, 7ffffffeh ; clear PE, PG bits\r
- stosd\r
- mov eax, cr4\r
- mov ebp, eax\r
- and ebp, 300h ; clear all but PCE and OSFXSR bits\r
- stosd\r
- sidt fword ptr [esp + 44] ; use parameter space to save IDTR\r
- sgdt fword ptr [edi]\r
- lidt _16Idtr\r
- push 10h\r
- pop eax\r
- push 8\r
- push offset @16Start\r
- lgdt _16Gdtr\r
- retf\r
-@16Start: ; 16-bit starts here\r
- mov ss, eax ; set SS to be a 16-bit segment\r
- mov cr0, ecx\r
- mov cr4, ebp\r
- mov ss, esi ; set up 16-bit stack\r
- mov sp, bx ; mov esp, ebx actually\r
- popaw ; popad actually\r
- pop ds\r
- pop es\r
- pop fs\r
- pop gs\r
- add sp, 4 ; skip _EFLAGS\r
+ .const\r
+\r
+m16Size DW offset InternalAsmThunk16 - offset m16Start\r
+mThunk16Attr DW offset _ThunkAttr - offset m16Start\r
+m16Gdt DW offset _NullSegDesc - offset m16Start\r
+m16GdtrBase DW offset _16GdtrBase - offset m16Start\r
+mTransition DW offset _EntryPoint - offset m16Start\r
+\r
+ .code\r
+\r
+m16Start LABEL BYTE\r
+\r
+SavedGdt LABEL FWORD\r
+ DW ?\r
+ DD ?\r
+\r
+_BackFromUserCode PROC\r
+ push ss\r
+ push cs\r
DB 66h\r
- retf ; transfer control to 16-bit code\r
-@16Return:\r
+ call @Base ; push eip\r
+@Base:\r
pushf ; pushfd actually\r
+ cli ; disable interrupts\r
push gs\r
push fs\r
push es\r
push ds\r
pushaw ; pushad actually\r
- DB 67h, 66h\r
- lds esi, fword ptr (IA32_REGS ptr [esp])._EIP\r
- DB 67h, 66h\r
- mov eax, [esi + 12]\r
- mov cr4, eax ; restore CR4\r
- DB 67h, 66h\r
- lgdt fword ptr [esi + 16]\r
- DB 67h, 66h\r
- mov eax, [esi + 8]\r
- mov cr0, eax ; restore CR0\r
- xor ax, ax ; xor eax, eax actually\r
+ DB 66h, 0bah ; mov edx, imm32\r
+_ThunkAttr DD ?\r
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15\r
+ jz @1\r
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h\r
+ cli ; disable interrupts\r
+ jnc @2\r
+@1:\r
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL\r
+ jz @2\r
+ in al, 92h\r
+ or al, 2\r
+ out 92h, al ; deactivate A20M#\r
+@2:\r
mov eax, ss\r
DB 67h\r
- mov dword ptr (IA32_REGS ptr [esp])._SS, eax\r
- shl ax, 4 ; shl eax, 4 actually\r
- add ax, sp ; add eax, esp actually\r
- add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)\r
- DB 67h, 66h\r
- mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp\r
- DB 67h, 66h\r
- lss esp, fword ptr [esi] ; restore protected mode stack\r
+ lea bp, [esp + sizeof (IA32_REGS)]\r
+ mov word ptr (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._ESP, bp\r
+ mov ebx, (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._EIP\r
+ shl ax, 4 ; shl eax, 4\r
+ add bp, ax ; add ebp, eax\r
+ DB 66h, 0b8h ; mov eax, imm32\r
+SavedCr4 DD ?\r
+ mov cr4, eax\r
+ DB 66h\r
+ lgdt fword ptr cs:[edi + (offset SavedGdt - offset @Base)]\r
+ DB 66h, 0b8h ; mov eax, imm32\r
+SavedCr0 DD ?\r
+ mov cr0, eax\r
+ DB 0b8h ; mov ax, imm16\r
+SavedSs DW ?\r
+ mov ss, eax\r
+ DB 66h, 0bch ; mov esp, imm32\r
+SavedEsp DD ?\r
DB 66h\r
- retf ; go back to protected mode\r
-@BackToThunk:\r
+ retf ; return to protected mode\r
+_BackFromUserCode ENDP\r
+\r
+_EntryPoint DD offset _ToUserCode - offset m16Start\r
+ DW 8h\r
+_16Idtr FWORD (1 SHL 10) - 1\r
+_16Gdtr LABEL FWORD\r
+ DW offset GdtEnd - offset _NullSegDesc - 1\r
+_16GdtrBase DD offset _NullSegDesc\r
+\r
+_ToUserCode PROC\r
+ mov edx, ss\r
+ mov ss, ecx ; set new segment selectors\r
+ mov ds, ecx\r
+ mov es, ecx\r
+ mov fs, ecx\r
+ mov gs, ecx\r
+ mov cr0, eax\r
+ mov cr4, ebp ; real mode starts at next instruction\r
+ mov ss, esi ; set up 16-bit stack segment\r
+ xchg sp, bx ; set up 16-bit stack pointer\r
+ DB 66h\r
+ call @Base ; push eip\r
+@Base:\r
+ pop bp ; ebp <- offset @Base\r
+ mov cs:[esi + (offset SavedSs - offset @Base)], edx\r
+ mov cs:[esi + (offset SavedEsp - offset @Base)], bx\r
+ DB 66h\r
+ lidt fword ptr cs:[esi + (offset _16Idtr - offset @Base)]\r
+ popaw ; popad actually\r
+ pop ds\r
+ pop es\r
+ pop fs\r
+ pop gs\r
+ popf ; popfd\r
+ DB 66h\r
+ retf ; transfer control to user code\r
+_ToUserCode ENDP\r
+\r
+_NullSegDesc DQ 0\r
+_16CsDesc LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 9bh\r
+ DB 8fh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+_16DsDesc LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 93h\r
+ DB 8fh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+GdtEnd LABEL QWORD\r
+\r
+;\r
+; @param RegSet Pointer to a IA32_DWORD_REGS structure\r
+; @param Transition Pointer to the transition code\r
+; @return The address of the 16-bit stack after returning from user code\r
+;\r
+InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs\r
+ mov esi, [esp + 36] ; esi <- RegSet\r
+ movzx edx, (IA32_REGS ptr [esi])._SS\r
+ mov edi, (IA32_REGS ptr [esi])._ESP\r
+ add edi, - (sizeof (IA32_REGS) + 4) ; reserve stack space\r
+ mov ebx, edi ; ebx <- stack offset\r
+ imul eax, edx, 16 ; eax <- edx * 16\r
+ push sizeof (IA32_REGS) / 4\r
+ add edi, eax ; edi <- linear address of 16-bit stack\r
+ pop ecx\r
+ rep movsd ; copy RegSet\r
+ mov eax, [esp + 40] ; eax <- address of transition code\r
+ mov esi, edx ; esi <- 16-bit stack segment\r
+ lea edx, [eax + (offset SavedCr0 - offset m16Start)]\r
+ mov ecx, eax\r
+ and ecx, 0fh\r
+ shl eax, 12\r
+ lea ecx, [ecx + (offset _BackFromUserCode - offset m16Start)]\r
+ mov ax, cx\r
+ stosd ; [edi] <- return address of user code\r
+ sgdt fword ptr [edx + (offset SavedGdt - offset SavedCr0)]\r
+ sidt fword ptr [esp + 36] ; save IDT stack in argument space\r
+ mov eax, cr0\r
+ mov [edx], eax ; save CR0 in SavedCr0\r
+ and eax, 7ffffffeh ; clear PE, PG bits\r
+ mov ebp, cr4\r
+ mov [edx + (offset SavedCr4 - offset SavedCr0)], ebp\r
+ and ebp, 300h ; clear all but PCE and OSFXSR bits\r
+ push 10h\r
+ pop ecx ; ecx <- selector for data segments\r
+ lgdt fword ptr [edx + (offset _16Gdtr - offset SavedCr0)]\r
+ call fword ptr [edx + (offset _EntryPoint - offset SavedCr0)]\r
lidt fword ptr [esp + 36] ; restore protected mode IDTR\r
+ lea eax, [ebp - sizeof (IA32_REGS)]\r
ret\r
InternalAsmThunk16 ENDP\r
\r
{\r
return FALSE;\r
}\r
+\r
+/**\r
+ Enables CPU interrupts for the smallest window required to capture any\r
+ pending interrupts.\r
+\r
+ Enables CPU interrupts for the smallest window required to capture any\r
+ pending interrupts.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+EnableDisableInterrupts (\r
+ VOID\r
+ )\r
+{\r
+ EnableInterrupts ();\r
+ DisableInterrupts ();\r
+}\r
--- /dev/null
+/// @file\r
+/// CpuPause() function for Itanium-based architecture.\r
+///\r
+/// Copyright (c) 2006, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: CpuPause.s\r
+///\r
+///\r
+\r
+.auto\r
+.text\r
+\r
+.proc CpuPause\r
+.type CpuPause, @function\r
+CpuPause::\r
+ hint @pause\r
+ br.ret.sptk.many b0\r
+.endp\r
;\r
;------------------------------------------------------------------------------\r
\r
- .data\r
+EXTERNDEF m16Start:BYTE\r
+EXTERNDEF m16Size:WORD\r
+EXTERNDEF mThunk16Attr:WORD\r
+EXTERNDEF m16Gdt:WORD\r
+EXTERNDEF m16GdtrBase:WORD\r
+EXTERNDEF mTransition:WORD\r
\r
-NullSegSel DQ 0\r
-_16CsSegSel LABEL QWORD\r
- DW -1\r
- DW 0\r
- DB 0\r
- DB 9bh\r
- DB 8fh ; 16-bit segment\r
- DB 0\r
-_16BitDsSel LABEL QWORD\r
- DW -1\r
- DW 0\r
- DB 0\r
- DB 93h\r
- DB 8fh ; 16-bit segment\r
- DB 0\r
-GdtEnd LABEL QWORD\r
-\r
- .const\r
-\r
-_16Gdtr LABEL FWORD\r
- DW offset GdtEnd - offset NullSegSel - 1\r
- DQ offset NullSegSel\r
-\r
-_16Idtr FWORD (1 SHL 10) - 1\r
-\r
- .code\r
+THUNK_ATTRIBUTE_BIG_REAL_MODE EQU 1\r
+THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 EQU 2\r
+THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL EQU 4\r
\r
IA32_REGS STRUC 4t\r
_EDI DD ?\r
_ES DW ?\r
_FS DW ?\r
_GS DW ?\r
-_RFLAGS DQ ?\r
+_EFLAGS DQ ?\r
_EIP DD ?\r
_CS DW ?\r
_SS DW ?\r
IA32_REGS ENDS\r
\r
-InternalAsmThunk16 PROC USES rbp rbx rsi rdi r12 r13 r14 r15\r
- mov eax, ds\r
- push rax\r
- mov eax, es\r
- push rax\r
- push fs\r
- push gs\r
- mov rsi, rcx ; rsi <- RegSet\r
- push sizeof (IA32_REGS)\r
- pop rcx\r
- movzx r8, (IA32_REGS ptr [rsi])._SS\r
- xor rdi, rdi\r
- mov edi, (IA32_REGS ptr [rsi])._ESP\r
- sub rdi, rcx ; reserve space on realmode stack\r
- push rdi ; save stack offset\r
- imul rax, r8, 16\r
- add rdi, rax ; rdi <- linear address of 16-bit stack\r
- rep movsb ; copy RegSet\r
- mov rsi, r8 ; si <- 16-bit stack segment\r
- pop rbx ; rbx <- 16-bit stack offset\r
- mov rdi, rdx ; rdi <- realmode patch\r
- lea eax, @BackToThunk ; rax <- address to back from real mode\r
- push rax ; use in a far return\r
- mov eax, cs\r
- mov [rsp + 4], eax ; save CS\r
- lea eax, @16Return ; thus @Return must < 4GB\r
- stosd ; set ret address offset\r
- xor eax, eax\r
- stosw ; set ret CS base to 0\r
- mov eax, esp\r
- stosd ; rsp must < 4GB\r
- mov eax, ss\r
- stosd\r
- mov rax, cr0\r
- mov ecx, eax ; ecx <- CR0\r
- and ecx, 7ffffffeh ; clear PE, PG bits\r
- stosd\r
- mov rax, cr4\r
- mov ebp, eax\r
- and ebp, 300h ; clear all but PCE and OSFXSR bits\r
- stosd\r
- sidt fword ptr [rsp + 70h] ; use parameter space to save IDTR\r
- sgdt fword ptr [rdi]\r
- lea edi, _16Idtr\r
- lea eax, @16Start ; rax <- seg:offset of @16Start\r
- push rax\r
- mov dword ptr [rsp + 4], 8\r
- push 10h\r
- pop rax ; rax <- 10h as dataseg selector\r
- lgdt _16Gdtr\r
- retf\r
-@16Start: ; 16-bit starts here\r
- mov ss, eax ; set SS to be a 16-bit segment\r
- mov cr0, rcx ; disable protected mode\r
- mov cr4, rbp\r
- DB 66h\r
- mov ecx, 0c0000080h\r
- rdmsr\r
- and ah, NOT 1 ; clear LME\r
- wrmsr\r
- mov ss, esi ; set up 16-bit stack\r
- mov sp, bx ; mov esp, ebx actually\r
- lidt fword ptr [edi]\r
- DB 66h, 61h ; popad\r
- DB 1fh ; pop ds\r
- DB 7 ; pop es\r
- pop fs\r
- pop gs\r
- add sp, 8 ; skip _RFLAGS\r
+ .const\r
+\r
+m16Size DW offset InternalAsmThunk16 - offset m16Start\r
+mThunk16Attr DW offset _ThunkAttr - offset m16Start\r
+m16Gdt DW offset _NullSegDesc - offset m16Start\r
+m16GdtrBase DW offset _16GdtrBase - offset m16Start\r
+mTransition DW offset _EntryPoint - offset m16Start\r
+\r
+ .code\r
+\r
+m16Start LABEL BYTE\r
+\r
+SavedGdt LABEL FWORD\r
+ DW ?\r
+ DQ ?\r
+\r
+_BackFromUserCode PROC\r
+ DB 16h ; push ss\r
+ DB 0eh ; push cs\r
DB 66h\r
- retf ; transfer control to 16-bit code\r
-@16Return:\r
+ call @Base ; push eip\r
+@Base:\r
DB 66h\r
- push 0 ; high order 32 bits of rflags\r
+ push 0 ; reserved high order 32 bits of EFlags\r
pushf ; pushfd actually\r
+ cli ; disable interrupts\r
push gs\r
push fs\r
DB 6 ; push es\r
DB 1eh ; push ds\r
DB 66h, 60h ; pushad\r
- DB 67h, 66h, 0c5h, 74h, 24h, 30h ; lds esi, [esp + 12*4]\r
- DB 66h\r
- mov eax, [esi + 12]\r
- mov cr4, rax ; restore CR4\r
- DB 66h\r
- lgdt fword ptr [esi + 16]\r
+ DB 66h, 0bah ; mov edx, imm32\r
+_ThunkAttr DD ?\r
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15\r
+ jz @1\r
+ mov eax, 15cd2401h ; mov ax, 2401h & int 15h\r
+ cli ; disable interrupts\r
+ jnc @2\r
+@1:\r
+ test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL\r
+ jz @2\r
+ in al, 92h\r
+ or al, 2\r
+ out 92h, al ; deactivate A20M#\r
+@2:\r
+ mov eax, ss\r
+ lea bp, [esp + sizeof (IA32_REGS)]\r
+ mov word ptr (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._ESP, bp\r
+ mov ebx, (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._EIP\r
+ shl ax, 4 ; shl eax, 4\r
+ add bp, ax ; add ebp, eax\r
+ DB 66h, 0b8h ; mov eax, imm32\r
+SavedCr4 DD ?\r
+ mov cr4, rax\r
+ DB 66h, 2eh\r
+ lgdt fword ptr [rdi + (offset SavedGdt - offset @Base)]\r
DB 66h\r
mov ecx, 0c0000080h\r
rdmsr\r
- or ah, 1 ; set LME\r
+ or ah, 1\r
wrmsr\r
+ DB 66h, 0b8h ; mov eax, imm32\r
+SavedCr0 DD ?\r
+ mov cr0, rax\r
+ DB 0b8h ; mov ax, imm16\r
+SavedSs DW ?\r
+ mov ss, eax\r
+ DB 66h, 0bch ; mov esp, imm32\r
+SavedEsp DD ?\r
DB 66h\r
- mov eax, [esi + 8]\r
- mov cr0, rax ; restore CR0\r
- xor ax, ax ; xor eax, eax actually\r
- mov eax, ss\r
- mov dword ptr (IA32_REGS ptr [esp])._SS, eax\r
- shl ax, 4 ; shl eax, 4 actually\r
- add ax, sp ; add eax, esp actually\r
- add sp, sizeof (IA32_REGS) ; add esp, sizeof (IA32_REGS)\r
+ retf ; return to protected mode\r
+_BackFromUserCode ENDP\r
+\r
+_EntryPoint DD offset _ToUserCode - offset m16Start\r
+ DW 8h\r
+_16Gdtr LABEL FWORD\r
+ DW offset GdtEnd - offset _NullSegDesc - 1\r
+_16GdtrBase DQ offset _NullSegDesc\r
+_16Idtr FWORD (1 SHL 10) - 1\r
+\r
+_ToUserCode PROC\r
+ mov edi, ss\r
+ mov ss, edx ; set new segment selectors\r
+ mov ds, edx\r
+ mov es, edx\r
+ mov fs, edx\r
+ mov gs, edx\r
DB 66h\r
- mov dword ptr (IA32_REGS ptr [esp - sizeof (IA32_REGS)])._ESP, esp\r
+ mov ecx, 0c0000080h\r
+ mov cr0, rax ; real mode starts at next instruction\r
+ rdmsr\r
+ and ah, NOT 1\r
+ wrmsr\r
+ mov cr4, rbp\r
+ mov ss, esi ; set up 16-bit stack segment\r
+ xchg sp, bx ; set up 16-bit stack pointer\r
DB 66h\r
- lss esp, fword ptr [esi] ; restore protected mode stack\r
+ call @Base ; push eip\r
+@Base:\r
+ pop bp ; ebp <- offset @Base\r
+ DB 2eh ; cs:\r
+ mov [rsi + (offset SavedSs - offset @Base)], edi\r
+ DB 2eh ; cs:\r
+ mov [rsi + (offset SavedEsp - offset @Base)], bx\r
+ DB 66h, 2eh ; CS and operand size override\r
+ lidt fword ptr [rsi + (offset _16Idtr - offset @Base)]\r
+ DB 66h, 61h ; popad\r
+ DB 1fh ; pop ds\r
+ DB 07h ; pop es\r
+ pop fs\r
+ pop gs\r
+ popf ; popfd\r
+ lea sp, [esp + 4] ; skip high order 32 bits of EFlags\r
DB 66h\r
- retf ; go back to protected mode\r
-@BackToThunk:\r
- lidt fword ptr [rsp + 68h] ; restore protected mode IDTR\r
- shl rax, 32\r
- shr rax, 32 ; clear high order 32 bits of RAX\r
+ retf ; transfer control to user code\r
+_ToUserCode ENDP\r
+\r
+_NullSegDesc DQ 0\r
+_16CsDesc LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 9bh\r
+ DB 8fh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+_16DsDesc LABEL QWORD\r
+ DW -1\r
+ DW 0\r
+ DB 0\r
+ DB 93h\r
+ DB 8fh ; 16-bit segment, 4GB limit\r
+ DB 0\r
+GdtEnd LABEL QWORD\r
+\r
+;\r
+; @param RegSet Pointer to a IA32_DWORD_REGS structure\r
+; @param Transition Pointer to the transition code\r
+; @return The address of the 16-bit stack after returning from user code\r
+;\r
+InternalAsmThunk16 PROC USES rbp rbx rsi rdi\r
+ mov r10d, ds\r
+ mov r11d, es\r
+ push fs\r
+ push gs\r
+ mov rsi, rcx\r
+ movzx r8d, (IA32_REGS ptr [rsi])._SS\r
+ mov edi, (IA32_REGS ptr [rsi])._ESP\r
+ lea rdi, [edi - (sizeof (IA32_REGS) + 4)]\r
+ imul eax, r8d, 16 ; eax <- r8d(stack segment) * 16\r
+ mov ebx, edi ; ebx <- stack offset for 16-bit code\r
+ push sizeof (IA32_REGS) / 4\r
+ add edi, eax ; edi <- linear address of 16-bit stack\r
+ pop rcx\r
+ rep movsd ; copy RegSet\r
+ lea ecx, [rdx + (offset SavedCr4 - offset m16Start)]\r
+ mov eax, edx ; eax <- transition code address\r
+ and edx, 0fh\r
+ shl eax, 12\r
+ lea edx, [rdx + (offset _BackFromUserCode - offset m16Start)]\r
+ mov ax, dx\r
+ stosd ; [edi] <- return address of user code\r
+ sgdt fword ptr [rcx + (offset SavedGdt - offset SavedCr4)]\r
+ sidt fword ptr [rsp + 38h] ; save IDT stack in argument space\r
+ mov rax, cr0\r
+ mov [rcx + (offset SavedCr0 - offset SavedCr4)], eax\r
+ and eax, 7ffffffeh ; clear PE, PG bits\r
+ mov rbp, cr4\r
+ mov [rcx], ebp ; save CR4 in SavedCr4\r
+ and ebp, 300h ; clear all but PCE and OSFXSR bits\r
+ mov esi, r8d ; esi <- 16-bit stack segment\r
+ push 10h\r
+ pop rdx ; rdx <- selector for data segments\r
+ lgdt fword ptr [rcx + (offset _16Gdtr - offset SavedCr4)]\r
+ call fword ptr [rcx + (offset _EntryPoint - offset SavedCr4)]\r
+ lidt fword ptr [rsp + 38h] ; restore protected mode IDTR\r
+ lea eax, [rbp - sizeof (IA32_REGS)]\r
pop gs\r
pop fs\r
- pop rcx\r
- mov es, ecx\r
- pop rcx\r
- mov ds, ecx\r
+ mov es, r11d\r
+ mov ds, r10d\r
ret\r
InternalAsmThunk16 ENDP\r
\r
\r
**/\r
\r
+//\r
+// Byte packed structure for a segment descriptor in a GDT/LDT\r
+//\r
+typedef union {\r
+ struct {\r
+ UINT32 LimitLow:16;\r
+ UINT32 BaseLow:16;\r
+ UINT32 BaseMid:8;\r
+ UINT32 Type:4;\r
+ UINT32 S:1;\r
+ UINT32 DPL:2;\r
+ UINT32 P:1;\r
+ UINT32 LimitHigh:4;\r
+ UINT32 AVL:1;\r
+ UINT32 L:1;\r
+ UINT32 DB:1;\r
+ UINT32 G:1;\r
+ UINT32 BaseHigh:8;\r
+ } Bits;\r
+ UINT64 Uint64;\r
+} IA32_SEGMENT_DESCRIPTOR;\r
+\r
+extern CONST UINT8 m16Start;\r
+extern CONST UINT16 m16Size;\r
+extern CONST UINT16 mThunk16Attr;\r
+extern CONST UINT16 m16Gdt;\r
+extern CONST UINT16 m16GdtrBase;\r
+extern CONST UINT16 mTransition;\r
+\r
/**\r
Invokes 16-bit code in big real mode and returns the updated register set.\r
\r
on the real mode stack and the starting address of the save area is returned.\r
\r
@param RegisterSet Values of registers before invocation of 16-bit code.\r
- @param Patch Pointer to the area following the 16-bit code.\r
+ @param Transition Pointer to the transition code under 1MB.\r
\r
@return The pointer to a IA32_REGISTER_SET structure containing the updated\r
register values.\r
IA32_REGISTER_SET *\r
InternalAsmThunk16 (\r
IN IA32_REGISTER_SET *RegisterSet,\r
- IN OUT VOID *Patch\r
+ IN OUT VOID *Transition\r
);\r
\r
+/**\r
+ Retrieves the properties for 16-bit thunk functions.\r
+\r
+ Computes the size of the buffer and stack below 1MB required to use the\r
+ AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
+ buffer size is returned in RealModeBufferSize, and the stack size is returned\r
+ in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
+ then the actual minimum stack size is ExtraStackSize plus the maximum number\r
+ of bytes that need to be passed to the 16-bit real mode code.\r
+\r
+ If RealModeBufferSize is NULL, then ASSERT().\r
+ If ExtraStackSize is NULL, then ASSERT().\r
+\r
+ @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r
+ required to use the 16-bit thunk functions.\r
+ @param ExtraStackSize A pointer to the extra size of stack below 1MB\r
+ that the 16-bit thunk functions require for\r
+ temporary storage in the transition to and from\r
+ 16-bit real mode.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmGetThunk16Properties (\r
+ OUT UINT32 *RealModeBufferSize,\r
+ OUT UINT32 *ExtraStackSize\r
+ )\r
+{\r
+ ASSERT (RealModeBufferSize != NULL);\r
+ ASSERT (ExtraStackSize != NULL);\r
+\r
+ *RealModeBufferSize = m16Size;\r
+ *ExtraStackSize = sizeof (IA32_DWORD_REGS) + 8;\r
+}\r
+\r
/**\r
Prepares all structures a code required to use AsmThunk16().\r
\r
OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
+ IA32_SEGMENT_DESCRIPTOR *RealModeGdt;\r
+\r
ASSERT (ThunkContext != NULL);\r
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);\r
+ ASSERT (ThunkContext->RealModeBufferSize >= m16Size);\r
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);\r
+ ASSERT (((UINTN)ThunkContext->RealModeBuffer & 0x0f) == 0);\r
+\r
+ CopyMem (ThunkContext->RealModeBuffer, &m16Start, m16Size);\r
+\r
+ //\r
+ // Point RealModeGdt to the GDT to be used in transition\r
+ //\r
+ // RealModeGdt[0]: Reserved as NULL descriptor\r
+ // RealModeGdt[1]: Code Segment\r
+ // RealModeGdt[2]: Data Segment\r
+ // RealModeGdt[3]: Call Gate\r
+ //\r
+ RealModeGdt = (IA32_SEGMENT_DESCRIPTOR*)(\r
+ (UINTN)ThunkContext->RealModeBuffer + m16Gdt);\r
+\r
+ //\r
+ // Update Code & Data Segment Descriptor\r
+ //\r
+ RealModeGdt[1].Bits.BaseLow =\r
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer & ~0xf;\r
+ RealModeGdt[1].Bits.BaseMid =\r
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer >> 16;\r
+\r
+ //\r
+ // Update transition code entry point offset\r
+ //\r
+ *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mTransition) +=\r
+ (UINT32)(UINTN)ThunkContext->RealModeBuffer & 0xf;\r
+\r
+ //\r
+ // Update Segment Limits for both Code and Data Segment Descriptors\r
+ //\r
+ if ((ThunkContext->ThunkAttributes & THUNK_ATTRIBUTE_BIG_REAL_MODE) == 0) {\r
+ //\r
+ // Set segment limits to 64KB\r
+ //\r
+ RealModeGdt[1].Bits.LimitHigh = 0;\r
+ RealModeGdt[1].Bits.G = 0;\r
+ RealModeGdt[2].Bits.LimitHigh = 0;\r
+ RealModeGdt[2].Bits.G = 0;\r
+ }\r
+\r
+ //\r
+ // Update GDTBASE for this thunk context\r
+ //\r
+ *(VOID**)((UINTN)ThunkContext->RealModeBuffer + m16GdtrBase) = RealModeGdt;\r
+\r
+ //\r
+ // Update Thunk Attributes\r
+ //\r
+ *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mThunk16Attr) =\r
+ ThunkContext->ThunkAttributes;\r
}\r
\r
/**\r
IN OUT THUNK_CONTEXT *ThunkContext\r
)\r
{\r
- UINT16 *Patch;\r
+ IA32_REGISTER_SET *UpdatedRegs;\r
\r
ASSERT (ThunkContext != NULL);\r
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);\r
+ ASSERT (ThunkContext->RealModeBufferSize >= m16Size);\r
+ ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);\r
+ ASSERT (((UINTN)ThunkContext->RealModeBuffer & 0x0f) == 0);\r
\r
- Patch = (UINT16*)(\r
- (UINTN)ThunkContext->RealModeCode +\r
- ThunkContext->RealModeCodeSize\r
- );\r
+ UpdatedRegs = InternalAsmThunk16 (\r
+ ThunkContext->RealModeState,\r
+ ThunkContext->RealModeBuffer\r
+ );\r
\r
- //\r
- // 0x9a66 is the OpCode of far call with an operand size override.\r
- //\r
- *Patch = 0x9a66;\r
-\r
- //\r
- // CopyMem() here copies the updated register values back to RealModeState\r
- //\r
- CopyMem (\r
- &ThunkContext->RealModeState,\r
- InternalAsmThunk16 (&ThunkContext->RealModeState, Patch + 1),\r
- sizeof (ThunkContext->RealModeState)\r
- );\r
+ CopyMem (ThunkContext->RealModeState, UpdatedRegs, sizeof (*UpdatedRegs));\r
}\r
\r
/**\r
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