Add RISC-V architecture for EDK2 CI testing.
BZ:2562:
https://bugzilla.tianocore.org/show_bug.cgi?id=2562
Signed-off-by: Abner Chang <abner.chang@hpe.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
#\r
# Copyright (c) 2016, Microsoft Corporation. All rights reserved.<BR>\r
# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
#\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
#\r
PLATFORM_VERSION = 0.1\r
DSC_SPECIFICATION = 0x00010005\r
OUTPUT_DIRECTORY = Build/FmpDevicePkg\r
- SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64\r
+ SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64\r
BUILD_TARGETS = DEBUG|RELEASE|NOOPT\r
SKUID_IDENTIFIER = DEFAULT\r
\r