ArmPlatform/PrePi: Fixed PrePi for MP Cores platform and Global Variable region settings

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12638 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
index 3d050bd150db82a8fea79b5e2c8a4db76a6b54a7..37b337bff299180267a7f271e114d051a20ea274 100644 (file)
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
@@ -18,7 +18,7 @@
 #include <Library/BaseMemoryLib.h>
 #include <Library/PcdLib.h>
 
-#define IS_XIP() ((PcdGet32 (PcdFdBaseAddress) > (PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \
+#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize))) || \
                   ((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet32 (PcdSystemMemoryBase)))
 
 // Declared by ArmPlatformPkg/PrePi Module
@@ -35,7 +35,8 @@ ArmPlatformGetGlobalVariable (
 
   if (IS_XIP()) {
     // In Case of XIP, we expect the Primary Stack at the top of the System Memory
-    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - PcdGet32 (PcdPeiGlobalVariableSize);
+    // The size must be 64bit aligned to allow 64bit variable to be aligned
+    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
   } else {
     GlobalVariableBase = mGlobalVariableBase;
   }
@@ -60,7 +61,8 @@ ArmPlatformSetGlobalVariable (
 
   if (IS_XIP()) {
     // In Case of XIP, we expect the Primary Stack at the top of the System Memory
-    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - PcdGet32 (PcdPeiGlobalVariableSize);
+    // The size must be 64bit aligned to allow 64bit variable to be aligned
+    GlobalVariableBase = PcdGet32 (PcdSystemMemoryBase) + PcdGet32 (PcdSystemMemorySize) - ALIGN_VALUE(PcdGet32 (PcdPeiGlobalVariableSize),0x8);
   } else {
     GlobalVariableBase = mGlobalVariableBase;
   }

diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 8d9fbe038287d0fe64907e02058183b2c499ca4e..8e61be1985b82436fca0b295f12286204ad6f818 100644 (file)
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -16,6 +16,32 @@
 \r
 #include <Library/ArmGicLib.h>\r
 \r
+#include <Ppi/ArmMpCoreInfo.h>\r
+\r
+EFI_STATUS\r
+GetPlatformPpi (\r
+  IN  EFI_GUID  *PpiGuid,\r
+  OUT VOID      **Ppi\r
+  )\r
+{\r
+  UINTN                   PpiListSize;\r
+  UINTN                   PpiListCount;\r
+  EFI_PEI_PPI_DESCRIPTOR  *PpiList;\r
+  UINTN                   Index;\r
+\r
+  PpiListSize = 0;\r
+  ArmPlatformGetPlatformPpiList (&PpiListSize, &PpiList);\r
+  PpiListCount = PpiListSize / sizeof(EFI_PEI_PPI_DESCRIPTOR);\r
+  for (Index = 0; Index < PpiListCount; Index++, PpiList++) {\r
+    if (CompareGuid (PpiList->Guid, PpiGuid) == TRUE) {\r
+      *Ppi = PpiList->Ppi;\r
+      return EFI_SUCCESS;\r
+    }\r
+  }\r
+\r
+  return EFI_NOT_FOUND;\r
+}\r
+\r
 VOID\r
 PrimaryMain (\r
   IN  UINTN                     UefiMemoryBase,\r
@@ -24,6 +50,15 @@ PrimaryMain (
   IN  UINT64                    StartTimeStamp\r
   )\r
 {\r
+  // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
+  DEBUG_CODE_BEGIN();\r
+    EFI_STATUS              Status;\r
+    ARM_MP_CORE_INFO_PPI    *ArmMpCoreInfoPpi;\r
+\r
+    Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
+    ASSERT_EFI_ERROR (Status);\r
+  DEBUG_CODE_END();\r
+\r
   // Enable the GIC Distributor\r
   ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));\r
 \r
@@ -44,23 +79,50 @@ SecondaryMain (
   IN  UINTN                     MpId\r
   )\r
 {\r
-  // Function pointer to Secondary Core entry point\r
-  VOID (*secondary_start)(VOID);\r
-  UINTN secondary_entry_addr=0;\r
+  EFI_STATUS              Status;\r
+  ARM_MP_CORE_INFO_PPI    *ArmMpCoreInfoPpi;\r
+  UINTN                   Index;\r
+  UINTN                   ArmCoreCount;\r
+  ARM_CORE_INFO           *ArmCoreInfoTable;\r
+  UINT32                  ClusterId;\r
+  UINT32                  CoreId;\r
+  VOID                    (*SecondaryStart)(VOID);\r
+  UINTN                   SecondaryEntryAddr;\r
+\r
+  ClusterId = GET_CLUSTER_ID(MpId);\r
+  CoreId    = GET_CORE_ID(MpId);\r
+\r
+  // On MP Core Platform we must implement the ARM MP Core Info PPI (gArmMpCoreInfoPpiGuid)\r
+  Status = GetPlatformPpi (&gArmMpCoreInfoPpiGuid, (VOID**)&ArmMpCoreInfoPpi);\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  ArmCoreCount = 0;\r
+  Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable);\r
+  ASSERT_EFI_ERROR (Status);\r
+\r
+  // Find the core in the ArmCoreTable\r
+  for (Index = 0; Index < ArmCoreCount; Index++) {\r
+    if ((ArmCoreInfoTable[Index].ClusterId == ClusterId) && (ArmCoreInfoTable[Index].CoreId == CoreId)) {\r
+      break;\r
+    }\r
+  }\r
+\r
+  // The ARM Core Info Table must define every core\r
+  ASSERT (Index != ArmCoreCount);\r
 \r
   // Clear Secondary cores MailBox\r
-  ArmClearMPCoreMailbox();\r
+  MmioWrite32 (ArmCoreInfoTable[Index].MailboxClearAddress, ArmCoreInfoTable[Index].MailboxClearValue);\r
 \r
-  while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {\r
-    ArmCallWFI();\r
+  SecondaryEntryAddr = 0;\r
+  while (SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress), SecondaryEntryAddr == 0) {\r
+    ArmCallWFI ();\r
     // Acknowledge the interrupt and send End of Interrupt signal.\r
     ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);\r
   }\r
 \r
-  secondary_start = (VOID (*)())secondary_entry_addr;\r
-\r
   // Jump to secondary core entry point.\r
-  secondary_start();\r
+  SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r
+  SecondaryStart();\r
 \r
   // The secondaries shouldn't reach here\r
   ASSERT(FALSE);\r

diff --git a/ArmPlatformPkg/PrePi/MainUniCore.c b/ArmPlatformPkg/PrePi/MainUniCore.c
index e56697ca5088be6b164b83e2b0f083033c82539b..43588a50ddb5f5622c7028e1ad846e6ed0118aa0 100644 (file)
--- a/ArmPlatformPkg/PrePi/MainUniCore.c
+++ b/ArmPlatformPkg/PrePi/MainUniCore.c
@@ -22,6 +22,11 @@ PrimaryMain (
   IN  UINT64                    StartTimeStamp\r
   )\r
 {\r
+  DEBUG_CODE_BEGIN();\r
+    // On MPCore system, PeiMpCore.inf should be used instead of PeiUniCore.inf\r
+    ASSERT(ArmIsMpCore() == 0);\r
+  DEBUG_CODE_END();\r
+\r
   PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);\r
 \r
   // We must never return\r

diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
index bb1d99449f2c09a26b2434e4f46ef9d414cd5277..4b7ef1be3e9d8aee04db36d1b701180c83a69118 100755 (executable)
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.S
@@ -34,7 +34,7 @@ ASM_PFX(_ModuleEntryPoint):
   and   r5, r0, r1\r
 \r
 _SetSVCMode:\r
-  // Enter SVC mode\r
+  // Enter SVC mode, Disable FIQ and IRQ\r
   mov     r1, #0x13|0x80|0x40\r
   msr     CPSR_c, r1\r
 \r
@@ -98,7 +98,7 @@ _GetStackBaseMpCore:
 \r
   // Is it the Primary Core ?\r
   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
-  cmp   r0, r4\r
+  cmp   r5, r4\r
   beq   _SetupPrimaryCoreStack\r
 \r
 _SetupSecondaryCoreStack:\r

diff --git a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
index e402e2657f4bf4e70baa86da1b301bd34f46c902..1e3560eb30bfa28db92459f20b0a19088ff04598 100644 (file)
--- a/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/ModuleEntryPoint.asm
@@ -35,7 +35,7 @@ _ModuleEntryPoint
   and   r5, r0, r1\r
 \r
 _SetSVCMode\r
-  // Enter SVC mode\r
+  // Enter SVC mode, Disable FIQ and IRQ\r
   mov     r1, #0x13|0x80|0x40\r
   msr     CPSR_c, r1\r
 \r
@@ -99,7 +99,7 @@ _GetStackBaseMpCore
 \r
   // Is it the Primary Core ?\r
   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r
-  cmp   r0, r4\r
+  cmp   r5, r4\r
   beq   _SetupPrimaryCoreStack\r
 \r
 _SetupSecondaryCoreStack\r

diff --git a/ArmPlatformPkg/PrePi/PeiMPCore.inf b/ArmPlatformPkg/PrePi/PeiMPCore.inf
index 81722c1123ccc9de7904c4f5b34a455956146fe4..9e76e653027aec519a78d1df40ab0333c73eab8c 100755 (executable)
--- a/ArmPlatformPkg/PrePi/PeiMPCore.inf
+++ b/ArmPlatformPkg/PrePi/PeiMPCore.inf
@@ -38,6 +38,7 @@
   BaseLib\r
   DebugLib\r
   DebugAgentLib\r
+  ArmCpuLib\r
   ArmLib\r
   ArmGicLib\r
   IoLib\r
@@ -55,6 +56,9 @@
   PlatformPeiLib\r
   MemoryInitPeiLib\r
 \r
+[Ppis]\r
+  gArmMpCoreInfoPpiGuid\r
+\r
 [Guids]\r
   gArmGlobalVariableGuid\r
 \r

diff --git a/ArmPlatformPkg/PrePi/PeiUniCore.inf b/ArmPlatformPkg/PrePi/PeiUniCore.inf
index 515748aafa93ffa0270da23544eb43abeb9269c2..a3bf867585d3192c2b79cd48064076fd764886be 100755 (executable)
--- a/ArmPlatformPkg/PrePi/PeiUniCore.inf
+++ b/ArmPlatformPkg/PrePi/PeiUniCore.inf
@@ -38,6 +38,7 @@
   BaseLib\r
   DebugLib\r
   DebugAgentLib\r
+  ArmCpuLib\r
   ArmLib\r
   IoLib\r
   TimerLib\r
@@ -57,6 +58,9 @@
 [Guids]\r
   gArmGlobalVariableGuid\r
 \r
+[Guids]\r
+  gArmGlobalVariableGuid\r
+\r
 [FeaturePcd]  \r
   gEmbeddedTokenSpaceGuid.PcdCacheEnable\r
   gEmbeddedTokenSpaceGuid.PcdPrePiProduceMemoryTypeInformationHob\r

diff --git a/ArmPlatformPkg/PrePi/PrePi.c b/ArmPlatformPkg/PrePi/PrePi.c
index 8eab7645a5c33146c6ca2178f7282590dd049b4d..1d2cbcec5e8fb56ec2607477282396cd20f7a4b0 100755 (executable)
--- a/ArmPlatformPkg/PrePi/PrePi.c
+++ b/ArmPlatformPkg/PrePi/PrePi.c
@@ -14,10 +14,9 @@
 \r
 #include <PiPei.h>\r
 \r
+#include <Library/ArmCpuLib.h>\r
 #include <Library/DebugAgentLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
 #include <Library/PrePiLib.h>\r
-#include <Library/IoLib.h>\r
 #include <Library/PrintLib.h>\r
 #include <Library/PeCoffGetEntryPointLib.h>\r
 #include <Library/PrePiHobListPointerLib.h>\r
@@ -31,7 +30,7 @@
 #include "PrePi.h"\r
 #include "LzmaDecompress.h"\r
 \r
-#define IS_XIP() ((FixedPcdGet32 (PcdFdBaseAddress) > (FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \\r
+#define IS_XIP() (((UINT32)FixedPcdGet32 (PcdFdBaseAddress) > (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize))) || \\r
                   ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) < FixedPcdGet32 (PcdSystemMemoryBase)))\r
 \r
 // Not used when PrePi in run in XIP mode\r
@@ -89,7 +88,7 @@ PrePiMain (
   // If ensure the FD is either part of the System Memory or totally outside of the System Memory (XIP)\r
   ASSERT (IS_XIP() || \r
           ((FixedPcdGet32 (PcdFdBaseAddress) >= FixedPcdGet32 (PcdSystemMemoryBase)) &&\r
-           ((FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize)))));\r
+           ((UINT32)(FixedPcdGet32 (PcdFdBaseAddress) + FixedPcdGet32 (PcdFdSize)) <= (UINT32)(FixedPcdGet32 (PcdSystemMemoryBase) + FixedPcdGet32 (PcdSystemMemorySize)))));\r
 \r
   // Enable program flow prediction, if supported.\r
   ArmEnableBranchPrediction ();\r
@@ -106,10 +105,6 @@ PrePiMain (
   // Initialize the Debug Agent for Source Level Debugging\r
   InitializeDebugAgent (DEBUG_AGENT_INIT_POSTMEM_SEC, NULL, NULL);\r
   SaveAndSetDebugTimerInterrupt (TRUE);\r
-\r
-  if (!IS_XIP()) {\r
-    mGlobalVariableBase = GlobalVariableBase;\r
-  }\r
   \r
   // Declare the PI/UEFI memory region\r
   HobList = HobConstructor (\r
@@ -125,7 +120,11 @@ PrePiMain (
   ASSERT_EFI_ERROR (Status);\r
 \r
   // Create the Stacks HOB (reserve the memory for all stacks)\r
-  StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) + (FixedPcdGet32(PcdClusterCount) * 4 * FixedPcdGet32(PcdCPUCoreSecondaryStackSize));\r
+  if (ArmIsMpCore ()) {\r
+    StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize) + (FixedPcdGet32(PcdClusterCount) * 4 * FixedPcdGet32(PcdCPUCoreSecondaryStackSize));\r
+  } else {\r
+    StacksSize = PcdGet32 (PcdCPUCorePrimaryStackSize);\r
+  }\r
   BuildStackHob (StacksBase, StacksSize);\r
 \r
   // Declare the Global Variable HOB\r
@@ -198,6 +197,17 @@ CEntryPoint (
   ArmEnableDataCache ();\r
   ArmEnableInstructionCache ();\r
 \r
+  // Define the Global Variable region when we are not running in XIP\r
+  if (!IS_XIP()) {\r
+    if (IS_PRIMARY_CORE(MpId)) {\r
+      mGlobalVariableBase = GlobalVariableBase;\r
+      ArmCpuSynchronizeSignal (ARM_CPU_EVENT_DEFAULT);\r
+    } else {\r
+         // Wait the Primay core has defined the address of the Global Variable region\r
+         ArmCpuSynchronizeWait (ARM_CPU_EVENT_DEFAULT);\r
+    }\r
+  }\r
+  \r
   // Write VBAR - The Vector table must be 32-byte aligned\r
   ASSERT (((UINT32)PrePiVectorTable & ((1 << 5)-1)) == 0);\r
   ArmWriteVBar ((UINT32)PrePiVectorTable);\r

diff --git a/ArmPlatformPkg/PrePi/PrePi.h b/ArmPlatformPkg/PrePi/PrePi.h
index 73f295c608bd0370c0fe1505dd6037b139622af7..e13900dbd477415a6d8092b99f69e4fe2fecbba2 100644 (file)
--- a/ArmPlatformPkg/PrePi/PrePi.h
+++ b/ArmPlatformPkg/PrePi/PrePi.h
@@ -19,7 +19,9 @@
 \r
 #include <Library/PcdLib.h>\r
 #include <Library/ArmLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
 #include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
 #include <Library/MemoryAllocationLib.h>\r
 #include <Library/HobLib.h>\r
 #include <Library/SerialPortLib.h>\r