UefiCpuPkg/MtrrLib: Skip Base MSR access when the pair is invalid

The patch optimized the MTRR access code to skip the Base MSR
access when the Mask MSR indicates the pair is invalid.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>

diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
index a7adbafae397b215752f663ef90c9e6db3a7dd87..2fd1d0153ee6d9f5accfecd99c3271101ab1d69e 100644 (file)
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
@@ -449,10 +449,13 @@ MtrrGetVariableMtrrWorker (
 \r
   for (Index = 0; Index < VariableMtrrCount; Index++) {\r
     if (MtrrSetting == NULL) {\r
-      VariableSettings->Mtrr[Index].Base =\r
-        AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1));\r
-      VariableSettings->Mtrr[Index].Mask =\r
-        AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1));\r
+      VariableSettings->Mtrr[Index].Mask = AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1));\r
+      //\r
+      // Skip to read the Base MSR when the Mask.V is not set.\r
+      //\r
+      if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *)&VariableSettings->Mtrr[Index].Mask)->Bits.V != 0) {\r
+        VariableSettings->Mtrr[Index].Base = AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1));\r
+      }\r
     } else {\r
       VariableSettings->Mtrr[Index].Base = MtrrSetting->Variables.Mtrr[Index].Base;\r
       VariableSettings->Mtrr[Index].Mask = MtrrSetting->Variables.Mtrr[Index].Mask;\r
@@ -2540,14 +2543,14 @@ MtrrSetVariableMtrrWorker (
   ASSERT (VariableMtrrCount <= ARRAY_SIZE (VariableSettings->Mtrr));\r
 \r
   for (Index = 0; Index < VariableMtrrCount; Index++) {\r
-    AsmWriteMsr64 (\r
-      MSR_IA32_MTRR_PHYSBASE0 + (Index << 1),\r
-      VariableSettings->Mtrr[Index].Base\r
-      );\r
-    AsmWriteMsr64 (\r
-      MSR_IA32_MTRR_PHYSMASK0 + (Index << 1),\r
-      VariableSettings->Mtrr[Index].Mask\r
-      );\r
+    //\r
+    // Mask MSR is always updated since caller might need to invalidate the MSR pair.\r
+    // Base MSR is skipped when Mask.V is not set.\r
+    //\r
+    AsmWriteMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1), VariableSettings->Mtrr[Index].Mask);\r
+    if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *)&VariableSettings->Mtrr[Index].Mask)->Bits.V != 0) {\r
+      AsmWriteMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1), VariableSettings->Mtrr[Index].Base);\r
+    }\r
   }\r
 }\r
 \r
@@ -2800,7 +2803,7 @@ MtrrDebugPrintAllMtrrsWorker (
     }\r
 \r
     for (Index = 0; Index < ARRAY_SIZE (Mtrrs->Variables.Mtrr); Index++) {\r
-      if ((Mtrrs->Variables.Mtrr[Index].Mask & BIT11) == 0) {\r
+      if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *)&Mtrrs->Variables.Mtrr[Index].Mask)->Bits.V == 0) {\r
         //\r
         // If mask is not valid, then do not display range\r
         //\r