Serial I/O Port library functions with no library constructor/destructor\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
\r
#include <Drivers/PL011Uart.h>\r
\r
+#define FRACTION_PART_SIZE_IN_BITS 6\r
+#define FRACTION_PART_MASK ((1 << FRACTION_PART_SIZE_IN_BITS) - 1)\r
+\r
//\r
// EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE is the only\r
// control bit that is not supported.\r
//\r
STATIC CONST UINT32 mInvalidControlBits = EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE;\r
\r
-/*\r
+/**\r
\r
Initialise the serial port to the specified settings.\r
All unspecified settings will be set to the default values.\r
\r
- @return Always return EFI_SUCCESS or EFI_INVALID_PARAMETER.\r
+ @param UartBase The base address of the serial device.\r
+ @param BaudRate The baud rate of the serial device. If the\r
+ baud rate is not supported, the speed will be\r
+ reduced to the nearest supported one and the\r
+ variable's value will be updated accordingly.\r
+ @param ReceiveFifoDepth The number of characters the device will\r
+ buffer on input. Value of 0 will use the\r
+ device's default FIFO depth.\r
+ @param Parity If applicable, this is the EFI_PARITY_TYPE\r
+ that is computed or checked as each character\r
+ is transmitted or received. If the device\r
+ does not support parity, the value is the\r
+ default parity value.\r
+ @param DataBits The number of data bits in each character.\r
+ @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
+ of stop bits per character.\r
+ If the device does not support stop bits, the\r
+ value is the default stop bit value.\r
+\r
+ @retval RETURN_SUCCESS All attributes were set correctly on the\r
+ serial device.\r
+ @retval RETURN_INVALID_PARAMETER One or more of the attributes has an\r
+ unsupported value.\r
\r
**/\r
RETURN_STATUS\r
EFIAPI\r
PL011UartInitializePort (\r
- IN OUT UINTN UartBase,\r
+ IN UINTN UartBase,\r
IN OUT UINT64 *BaudRate,\r
IN OUT UINT32 *ReceiveFifoDepth,\r
IN OUT EFI_PARITY_TYPE *Parity,\r
LineControl = 0;\r
\r
// The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept\r
- // 1 char buffer as the minimum fifo size. Because everything can be rounded down,\r
- // there is no maximum fifo size.\r
+ // 1 char buffer as the minimum FIFO size. Because everything can be rounded\r
+ // down, there is no maximum FIFO size.\r
if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) {\r
+ // Enable FIFO\r
LineControl |= PL011_UARTLCR_H_FEN;\r
if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)\r
*ReceiveFifoDepth = 32;\r
*ReceiveFifoDepth = 16;\r
} else {\r
ASSERT (*ReceiveFifoDepth < 32);\r
- // Nothing else to do. 1 byte fifo is default.\r
+ // Nothing else to do. 1 byte FIFO is default.\r
*ReceiveFifoDepth = 1;\r
}\r
\r
LineControl |= PL011_UARTLCR_H_PEN;\r
break;\r
case MarkParity:\r
- LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS | PL011_UARTLCR_H_EPS);\r
+ LineControl |= ( PL011_UARTLCR_H_PEN \\r
+ | PL011_UARTLCR_H_SPS \\r
+ | PL011_UARTLCR_H_EPS);\r
break;\r
case SpaceParity:\r
LineControl |= (PL011_UARTLCR_H_PEN | PL011_UARTLCR_H_SPS);\r
LineControl |= PL011_UARTLCR_H_STP2;\r
break;\r
case OneFiveStopBits:\r
- // Only 1 or 2 stops bits are supported\r
+ // Only 1 or 2 stop bits are supported\r
default:\r
return RETURN_INVALID_PARAMETER;\r
}\r
// Baud Rate\r
//\r
\r
- // If PL011 Integral value has been defined then always ignore the BAUD rate\r
+ // If PL011 Integer value has been defined then always ignore the BAUD rate\r
if (PcdGet32 (PL011UartInteger) != 0) {\r
MmioWrite32 (UartBase + UARTIBRD, PcdGet32 (PL011UartInteger));\r
MmioWrite32 (UartBase + UARTFBRD, PcdGet32 (PL011UartFractional));\r
}\r
\r
Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / *BaudRate;\r
- MmioWrite32 (UartBase + UARTIBRD, Divisor >> 6);\r
- MmioWrite32 (UartBase + UARTFBRD, Divisor & 0x3F);\r
+ MmioWrite32 (UartBase + UARTIBRD, Divisor >> FRACTION_PART_SIZE_IN_BITS);\r
+ MmioWrite32 (UartBase + UARTFBRD, Divisor & FRACTION_PART_MASK);\r
}\r
\r
// No parity, 1 stop, no fifo, 8 data bits\r
// Clear any pending errors\r
MmioWrite32 (UartBase + UARTECR, 0);\r
\r
- // Enable tx, rx, and uart overall\r
- MmioWrite32 (UartBase + UARTCR, PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);\r
+ // Enable Tx, Rx, and UART overall\r
+ MmioWrite32 (UartBase + UARTCR,\r
+ PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN);\r
\r
return RETURN_SUCCESS;\r
}\r
disable the hardware flow control based on CTS (Clear\r
To Send) and RTS (Ready To Send) control signals.\r
\r
- @retval RETURN_SUCCESS The new control bits were set on the serial device.\r
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.\r
+ @retval RETURN_SUCCESS The new control bits were set on the device.\r
+ @retval RETURN_UNSUPPORTED The device does not support this operation.\r
\r
**/\r
RETURN_STATUS\r
@param[in] UartBase UART registers base address\r
@param[out] Control Status of the control bits on a serial device :\r
\r
- . EFI_SERIAL_DATA_CLEAR_TO_SEND, EFI_SERIAL_DATA_SET_READY,\r
- EFI_SERIAL_RING_INDICATE, EFI_SERIAL_CARRIER_DETECT,\r
- EFI_SERIAL_REQUEST_TO_SEND, EFI_SERIAL_DATA_TERMINAL_READY\r
- are all related to the DTE (Data Terminal Equipment) and\r
- DCE (Data Communication Equipment) modes of operation of\r
- the serial device.\r
- . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the receive\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the transmit\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if the\r
- hardware loopback is enabled (the ouput feeds the receive\r
- buffer), 0 otherwise.\r
- . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if a\r
- loopback is accomplished by software, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to one if the\r
- hardware flow control based on CTS (Clear To Send) and RTS\r
- (Ready To Send) control signals is enabled, 0 otherwise.\r
+ . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
+ EFI_SERIAL_DATA_SET_READY,\r
+ EFI_SERIAL_RING_INDICATE,\r
+ EFI_SERIAL_CARRIER_DETECT,\r
+ EFI_SERIAL_REQUEST_TO_SEND,\r
+ EFI_SERIAL_DATA_TERMINAL_READY\r
+ are all related to the DTE (Data Terminal Equipment)\r
+ and DCE (Data Communication Equipment) modes of\r
+ operation of the serial device.\r
+ . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
+ receive buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
+ transmit buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
+ the hardware loopback is enabled (the ouput feeds the\r
+ receive buffer), 0 otherwise.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if\r
+ a loopback is accomplished by software, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
+ one if the hardware flow control based on CTS (Clear\r
+ To Send) and RTS (Ready To Send) control signals is\r
+ enabled, 0 otherwise.\r
\r
@retval RETURN_SUCCESS The control bits were read from the serial device.\r
\r
/** @file\r
*\r
-* Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
+* Copyright (c) 2011-2016, ARM Limited. All rights reserved.\r
*\r
* This program and the accompanying materials\r
* are licensed and made available under the terms and conditions of the BSD License\r
\r
/*\r
\r
- Programmed hardware of Serial port.\r
-\r
- @return Always return EFI_UNSUPPORTED.\r
+ Initialise the serial port to the specified settings.\r
+ All unspecified settings will be set to the default values.\r
+\r
+ @param UartBase The base address of the serial device.\r
+ @param BaudRate The baud rate of the serial device. If the\r
+ baud rate is not supported, the speed will be\r
+ reduced to the nearest supported one and the\r
+ variable's value will be updated accordingly.\r
+ @param ReceiveFifoDepth The number of characters the device will\r
+ buffer on input. Value of 0 will use the\r
+ device's default FIFO depth.\r
+ @param Parity If applicable, this is the EFI_PARITY_TYPE\r
+ that is computed or checked as each character\r
+ is transmitted or received. If the device\r
+ does not support parity, the value is the\r
+ default parity value.\r
+ @param DataBits The number of data bits in each character.\r
+ @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
+ of stop bits per character.\r
+ If the device does not support stop bits, the\r
+ value is the default stop bit value.\r
+\r
+ @retval RETURN_SUCCESS All attributes were set correctly on the\r
+ serial device.\r
+ @retval RETURN_INVALID_PARAMETER One or more of the attributes has an\r
+ unsupported value.\r
\r
**/\r
RETURN_STATUS\r
EFIAPI\r
PL011UartInitializePort (\r
- IN OUT UINTN UartBase,\r
+ IN UINTN UartBase,\r
IN OUT UINT64 *BaudRate,\r
IN OUT UINT32 *ReceiveFifoDepth,\r
IN OUT EFI_PARITY_TYPE *Parity,\r
disable the hardware flow control based on CTS (Clear\r
To Send) and RTS (Ready To Send) control signals.\r
\r
- @retval RETURN_SUCCESS The new control bits were set on the serial device.\r
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.\r
+ @retval RETURN_SUCCESS The new control bits were set on the device.\r
+ @retval RETURN_UNSUPPORTED The device does not support this operation.\r
\r
**/\r
RETURN_STATUS\r
@param[in] UartBase UART registers base address\r
@param[out] Control Status of the control bits on a serial device :\r
\r
- . EFI_SERIAL_DATA_CLEAR_TO_SEND, EFI_SERIAL_DATA_SET_READY,\r
- EFI_SERIAL_RING_INDICATE, EFI_SERIAL_CARRIER_DETECT,\r
- EFI_SERIAL_REQUEST_TO_SEND, EFI_SERIAL_DATA_TERMINAL_READY\r
- are all related to the DTE (Data Terminal Equipment) and\r
- DCE (Data Communication Equipment) modes of operation of\r
- the serial device.\r
- . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the receive\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the transmit\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if the\r
- hardware loopback is enabled (the ouput feeds the receive\r
- buffer), 0 otherwise.\r
- . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if a\r
- loopback is accomplished by software, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to one if the\r
- hardware flow control based on CTS (Clear To Send) and RTS\r
- (Ready To Send) control signals is enabled, 0 otherwise.\r
-\r
+ . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
+ EFI_SERIAL_DATA_SET_READY,\r
+ EFI_SERIAL_RING_INDICATE,\r
+ EFI_SERIAL_CARRIER_DETECT,\r
+ EFI_SERIAL_REQUEST_TO_SEND,\r
+ EFI_SERIAL_DATA_TERMINAL_READY\r
+ are all related to the DTE (Data Terminal Equipment)\r
+ and DCE (Data Communication Equipment) modes of\r
+ operation of the serial device.\r
+ . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
+ receive buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
+ transmit buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
+ the hardware loopback is enabled (the ouput feeds the\r
+ receive buffer), 0 otherwise.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if\r
+ a loopback is accomplished by software, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
+ one if the hardware flow control based on CTS (Clear\r
+ To Send) and RTS (Ready To Send) control signals is\r
+ enabled, 0 otherwise.\r
\r
@retval RETURN_SUCCESS The control bits were read from the serial device.\r
\r
Serial I/O Port library functions with no library constructor/destructor\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- Copyright (c) 2012 - 2014, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2012 - 2016, ARM Ltd. All rights reserved.<BR>\r
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
EFI_STOP_BITS_TYPE StopBits;\r
\r
BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);\r
- ReceiveFifoDepth = 0; // Use the default value for Fifo depth\r
+ ReceiveFifoDepth = 0; // Use default FIFO depth\r
Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);\r
DataBits = PcdGet8 (PcdUartDefaultDataBits);\r
StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);\r
\r
return PL011UartInitializePort (\r
(UINTN)PcdGet64 (PcdSerialRegisterBase),\r
- &BaudRate, &ReceiveFifoDepth, &Parity, &DataBits, &StopBits);\r
+ &BaudRate,\r
+ &ReceiveFifoDepth,\r
+ &Parity,\r
+ &DataBits,\r
+ &StopBits\r
+ );\r
}\r
\r
/**\r
/**\r
Set new attributes to PL011.\r
\r
- @param BaudRate The baud rate of the serial device. If the baud rate is not supported,\r
- the speed will be reduced down to the nearest supported one and the\r
- variable's value will be updated accordingly.\r
- @param ReceiveFifoDepth The number of characters the device will buffer on input. If the specified\r
- value is not supported, the variable's value will be reduced down to the\r
- nearest supported one.\r
- @param Timeout If applicable, the number of microseconds the device will wait\r
- before timing out a Read or a Write operation.\r
- @param Parity If applicable, this is the EFI_PARITY_TYPE that is computed or checked\r
- as each character is transmitted or received. If the device does not\r
- support parity, the value is the default parity value.\r
+ @param BaudRate The baud rate of the serial device. If the\r
+ baud rate is not supported, the speed will\r
+ be reduced down to the nearest supported one\r
+ and the variable's value will be updated\r
+ accordingly.\r
+ @param ReceiveFifoDepth The number of characters the device will\r
+ buffer on input. If the specified value is\r
+ not supported, the variable's value will\r
+ be reduced down to the nearest supported one.\r
+ @param Timeout If applicable, the number of microseconds the\r
+ device will wait before timing out a Read or\r
+ a Write operation.\r
+ @param Parity If applicable, this is the EFI_PARITY_TYPE\r
+ that is computed or checked as each character\r
+ is transmitted or received. If the device\r
+ does not support parity, the value is the\r
+ default parity value.\r
@param DataBits The number of data bits in each character\r
- @param StopBits If applicable, the EFI_STOP_BITS_TYPE number of stop bits per character.\r
- If the device does not support stop bits, the value is the default stop\r
- bit value.\r
+ @param StopBits If applicable, the EFI_STOP_BITS_TYPE number\r
+ of stop bits per character. If the device\r
+ does not support stop bits, the value is the\r
+ default stop bit value.\r
\r
- @retval EFI_SUCCESS All attributes were set correctly on the serial device.\r
- @retval EFI_INVALID_PARAMETERS One or more of the attributes has an unsupported value.\r
+ @retval EFI_SUCCESS All attributes were set correctly.\r
+ @retval EFI_INVALID_PARAMETERS One or more attributes has an unsupported\r
+ value.\r
\r
**/\r
RETURN_STATUS\r
)\r
{\r
return PL011UartInitializePort (\r
- (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
- BaudRate,\r
- ReceiveFifoDepth,\r
- Parity,\r
- DataBits,\r
- StopBits);\r
+ (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
+ BaudRate,\r
+ ReceiveFifoDepth,\r
+ Parity,\r
+ DataBits,\r
+ StopBits\r
+ );\r
}\r
\r
/**\r
disable the hardware flow control based on CTS (Clear\r
To Send) and RTS (Ready To Send) control signals.\r
\r
- @retval RETURN_SUCCESS The new control bits were set on the serial device.\r
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.\r
+ @retval RETURN_SUCCESS The new control bits were set on the device.\r
+ @retval RETURN_UNSUPPORTED The device does not support this operation.\r
\r
**/\r
RETURN_STATUS\r
\r
@param[out] Control Status of the control bits on a serial device :\r
\r
- . EFI_SERIAL_DATA_CLEAR_TO_SEND, EFI_SERIAL_DATA_SET_READY,\r
- EFI_SERIAL_RING_INDICATE, EFI_SERIAL_CARRIER_DETECT,\r
- EFI_SERIAL_REQUEST_TO_SEND, EFI_SERIAL_DATA_TERMINAL_READY\r
- are all related to the DTE (Data Terminal Equipment) and\r
- DCE (Data Communication Equipment) modes of operation of\r
- the serial device.\r
- . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the receive\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the transmit\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if the\r
- hardware loopback is enabled (the output feeds the receive\r
- buffer), 0 otherwise.\r
- . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if a\r
- loopback is accomplished by software, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to one if the\r
- hardware flow control based on CTS (Clear To Send) and RTS\r
- (Ready To Send) control signals is enabled, 0 otherwise.\r
-\r
- @retval RETURN_SUCCESS The control bits were read from the serial device.\r
+ . EFI_SERIAL_DATA_CLEAR_TO_SEND,\r
+ EFI_SERIAL_DATA_SET_READY,\r
+ EFI_SERIAL_RING_INDICATE,\r
+ EFI_SERIAL_CARRIER_DETECT,\r
+ EFI_SERIAL_REQUEST_TO_SEND,\r
+ EFI_SERIAL_DATA_TERMINAL_READY\r
+ are all related to the DTE (Data Terminal Equipment)\r
+ and DCE (Data Communication Equipment) modes of\r
+ operation of the serial device.\r
+ . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the\r
+ receive buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the\r
+ transmit buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if\r
+ the hardware loopback is enabled (the output feeds\r
+ the receive buffer), 0 otherwise.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one\r
+ if a loopback is accomplished by software, else 0.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to\r
+ one if the hardware flow control based on CTS (Clear\r
+ To Send) and RTS (Ready To Send) control signals is\r
+ enabled, 0 otherwise.\r
+\r
+ @retval RETURN_SUCCESS The control bits were read from the device.\r
\r
**/\r
RETURN_STATUS\r
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