#include <AsmMacroIoLibV8.h>\r
#include <Library/ArmLib.h>\r
\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
-\r
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
-\r
-\r
-PrimaryCoreMpid: .word 0x0\r
-\r
//UINTN\r
//ArmPlatformGetCorePosition (\r
// IN UINTN MpId\r
// );\r
// With this function: CorePos = (ClusterId * 2) + CoreId\r
-ASM_PFX(ArmPlatformGetCorePosition):\r
+ASM_FUNC(ArmPlatformGetCorePosition)\r
and x1, x0, #ARM_CORE_MASK\r
and x0, x0, #ARM_CLUSTER_MASK\r
add x0, x1, x0, LSR #7\r
//ArmPlatformGetPrimaryCoreMpId (\r
// VOID\r
// );\r
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):\r
- ldr x0, =PrimaryCoreMpid\r
- ldrh w0, [x0]\r
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)\r
+ ldr w0, PrimaryCoreMpid\r
ret\r
\r
//UINTN\r
//ArmPlatformIsPrimaryCore (\r
// IN UINTN MpId\r
// );\r
-ASM_PFX(ArmPlatformIsPrimaryCore):\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)\r
- ldrh w1, [x1]\r
+ASM_FUNC(ArmPlatformIsPrimaryCore)\r
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))\r
and x0, x0, x1\r
\r
- ldr x1, =PrimaryCoreMpid\r
- ldrh w1, [x1]\r
+ ldr w1, PrimaryCoreMpid\r
\r
cmp w0, w1\r
- mov x0, #1\r
- mov x1, #0\r
- csel x0, x0, x1, eq\r
+ cset x0, eq\r
ret\r
\r
-ASM_PFX(ArmPlatformPeiBootAction):\r
+ASM_FUNC(ArmPlatformPeiBootAction)\r
// The trusted firmware passes the primary CPU MPID through x0 register.\r
// Save it in a variable.\r
- ldr x1, =PrimaryCoreMpid\r
+ adr x1, PrimaryCoreMpid\r
str w0, [x1]\r
ret\r
\r
+PrimaryCoreMpid: .word 0x0\r
*\r
**/\r
\r
-#include <AsmMacroIoLibV8.h>\r
+#include <AsmMacroIoLib.h>\r
#include <Library/ArmLib.h>\r
\r
-.text\r
-.align 3\r
-\r
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)\r
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)\r
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)\r
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)\r
-\r
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)\r
-\r
-\r
-PrimaryCoreMpid: .word 0x0\r
-\r
//\r
// Return the core position from the value of its MpId register\r
//\r
// IN UINTN MpId\r
// );\r
// With this function: CorePos = (ClusterId * 2) + CoreId\r
-ASM_PFX(ArmPlatformGetCorePosition):\r
+ASM_FUNC(ArmPlatformGetCorePosition)\r
and r1, r0, #ARM_CORE_MASK\r
and r0, r0, #ARM_CLUSTER_MASK\r
add r0, r1, r0, LSR #7\r
//ArmPlatformGetPrimaryCoreMpId (\r
// VOID\r
// );\r
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):\r
- ldr r0, =PrimaryCoreMpid\r
- ldr r0, [r0]\r
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)\r
+ LDRL (r0, PrimaryCoreMpid)\r
bx lr\r
\r
//\r
//ArmPlatformIsPrimaryCore (\r
// IN UINTN MpId\r
// );\r
-ASM_PFX(ArmPlatformIsPrimaryCore):\r
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)\r
- ldr r1, [r1]\r
+ASM_FUNC(ArmPlatformIsPrimaryCore)\r
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))\r
and r0, r0, r1\r
\r
- ldr r1, =PrimaryCoreMpid\r
- ldr r1, [r1]\r
+ LDRL (r1, PrimaryCoreMpid)\r
\r
cmp r0, r1\r
moveq r0, #1\r
// or PrePeiCore modules. It allows to retrieve arguments passed to\r
// the UEFI firmware through the CPU registers.\r
//\r
-ASM_PFX(ArmPlatformPeiBootAction):\r
+ASM_FUNC(ArmPlatformPeiBootAction)\r
// The trusted firmware passes the primary CPU MPID through r0 register.\r
// Save it in a variable.\r
- ldr r1, =PrimaryCoreMpid\r
+ adr r1, PrimaryCoreMpid\r
str r0, [r1]\r
bx lr\r
+\r
+PrimaryCoreMpid: .word 0x0\r